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10.7.7
Contention between 8TCNT Byte Write and Increment in 16-Bit Count Mode
(Cascaded Connection)
If an increment pulse occurs in the T
mode, writing takes priority and 8TCNT is not incremented. The byte data for which a write was
not performed retains its previous value. Figure 10.24 shows the timing when an increment pulse
occurs in the T
state of a byte write to 8TCNTH.
2
Address bus
Internal write signal
8TCNT input clock
8TCNTH
8TCNTL
Figure 10.24 Contention between 8TCNT Byte Write and Increment in 16-Bit Count Mode
or T
state of a 8TCNT byte write cycle in 16-bit count
2
3
8TCNTH byte write cycle
T
1
φ
T
2
8TCNTH address
N
X
T
3
8TCNT write data
X+1
379
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