Cpu Special-Function Registers (Sfrs) - Intel 8XC196MC User Manual

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Your program must load a word-aligned (even) address into the stack pointer. Select an address
that is two bytes greater than the desired starting address because the CPU automatically decre-
ments the stack pointer before it pushes the first byte of the return address onto the stack. Remem-
ber that the stack grows downward, so allow sufficient room for the maximum number of stack
entries. The stack must be located in either the internal register file or external RAM. The stack
can be used most efficiently when it is located in the register file.
The following example initializes the top of the upper register file (8XC196MC, MD) as the
stack. (For the 8XC196MH, the immediate value would be #300H.)
LD
SP, #200H
The following example shows how to allow the linker locator to determine where the stack fits
in the memory map that you specify.
LD
SP, #STACK
4.1.6.3

CPU Special-function Registers (SFRs)

Locations 0000–0017H in the lower register file are the CPU SFRs (Table 4-8). Appendix C de-
scribes the CPU SFRs.
Using any SFR as a base or index register for indirect or indexed operations
can cause unpredictable results because external events can change the
contents of SFRs. Also, because some SFRs are cleared when read, consider
the implications of using an SFR as an operand in a read-modify-write
instruction (e.g., XORB).
;Load stack pointer
Table 4-8. CPU SFRs
Address
High (Odd) Byte
0016H
Reserved
0014H
Reserved
0012H
INT_MASK1
0010H
Reserved
000EH
Reserved
000CH
Reserved
000AH
Reserved
0008H
INT_PEND
0006H
PTSSRV (H)
0004H
PTSSEL (H)
0002H
ONES_REG (H)
0000H
ZERO_REG (H)
NOTE
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MEMORY PARTITIONS
Low (Even) Byte
Reserved
WSR
INT_PEND1
Reserved
Reserved
Reserved
WATCHDOG
INT_MASK
PTSSRV (L)
PTSSEL (L)
ONES_REG (L)
ZERO_REG (L)
4-11

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