Serial Peripheral Interface/ Inter-Ic Sound (Spi/I2S); Introduction; Spi Main Features - ST STM32F446 Series Reference Manual

Serial peripheral interface/ inter-IC sound (SPI/I2S)

26 Serial peripheral interface/ inter-IC sound (SPI/I2S)
26.1

Introduction

The SPI/I²S interface can be used to communicate with external devices using the SPI
protocol or the I
selected by default after a device reset.
The serial peripheral interface (SPI) protocol supports half-duplex, full-duplex and simplex
synchronous, serial communication with external devices. The interface can be configured
as master and in this case it provides the communication clock (SCK) to the external slave
device. The interface is also capable of operating in multimaster configuration.
The Inter-IC sound (I
can operate in slave or master mode with half-duplex communication. Full duplex
operations are possible by combining two I2S blocks.
It can address four different audio standards including the Philips I
and LSB-justified standards and the PCM standard.
26.1.1

SPI main features

•
Master or slave operation
• Full-duplex synchronous transfers on three lines
•
Half-duplex synchronous transfer on two lines (with bidirectional data line)
• Simplex synchronous transfers on two lines (with unidirectional data line)
•
8-bit or 16-bit transfer frame format selection
• Multimaster mode capability
•
8 master mode baud rate prescalers up to f
•
Slave mode frequency up to f
•
NSS management by hardware or software for both master and slave: dynamic change
of master/slave operations
•
Programmable clock polarity and phase
•
Programmable data order with MSB-first or LSB-first shifting
• Dedicated transmission and reception flags with interrupt capability
•
SPI bus busy status flag
• SPI Motorola support
•
Hardware CRC feature for reliable communication:
–
–
• Master mode fault, overrun flags with interrupt capability
•
CRC Error flag
•
1-byte/word transmission and reception buffer with DMA capability: Tx and Rx requests
846/1328
2
S audio protocol. SPI or I
2
S) protocol is also a synchronous serial communication interface. It
CRC value can be transmitted as last byte in Tx mode
Automatic CRC error checking for last received byte
2
S mode is selectable by software. SPI mode is
/2.
PCLK
/2.
PCLK
RM0390 Rev 4
RM0390
2
S standard, the MSB-