29.15.43 Otg Device Control In Endpoint 0 Control Register; (Otg_Diepctl0) - ST STM32F412 Reference Manual

RM0402
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 INEPTXFEM[15:0]: IN EP Tx FIFO empty interrupt mask bits

29.15.43 OTG device control IN endpoint 0 control register

(OTG_DIEPCTL0)

Address offset: 0x900
Reset value: 0x0000 0000
This section describes the OTG_DIEPCTL0 register for USB_OTG FS. Nonzero control
endpoints use registers for endpoints 1–3.
31 30 29
EPENA EPDIS Res. Res.
rs rs
15 14 13
USBA
Res. Res. Res.
EP
r
Bit 31 EPENA: Endpoint enable
Bit 30 EPDIS: Endpoint disable
Bits 29:28 Reserved, must be kept at reset value.
Bit 27 SNAK: Set NAK
Bit 26 CNAK: Clear NAK
Bits 25:22 TXFNUM[3:0]: Tx FIFO number
These bits act as mask bits for OTG_DIEPINTx.
TXFE interrupt one bit per IN endpoint:
Bit 0 for IN endpoint 0, bit 3 for IN endpoint 3
0: Masked interrupt
1: Unmasked interrupt
28 27 26 25
SNAK CNAK
w w rw
12 11 10 9
Res. Res. Res.
The application sets this bit to start transmitting data on the endpoint 0.
The core clears this bit before setting any of the following interrupts on this endpoint:
– Endpoint disabled
– Transfer completed
The application sets this bit to stop transmitting data on an endpoint, even before the
transfer for that endpoint is complete. The application must wait for the endpoint disabled
interrupt before treating the endpoint as disabled. The core clears this bit before setting the
endpoint disabled interrupt. The application must set this bit only if endpoint enable is
already set for this endpoint.
A write to this bit sets the NAK bit for the endpoint.
Using this bit, the application can control the transmission of NAK handshakes on an
endpoint. The core can also set this bit for an endpoint after a SETUP packet is received on
that endpoint.
A write to this bit clears the NAK bit for the endpoint.
This value is set to the FIFO number that is assigned to IN endpoint 0.
USB on-the-go full-speed (OTG_FS)
24 23 22
TXFNUM[3:0] STALL
rw rw rw
8 7 6
Res. Res. Res.
RM0402 Rev 6
21 20 19 18
Res. EPTYP
rs r r
5 4 3 2
Res. Res. Res. Res.
17 16
NAK
Res.
STS
r
1 0
MPSIZ[1:0]
rw rw
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