Delta ASD-A2-0121 Series User Manual page 416

ASDA-A2
P2-50 CCLR Pulse Clear Mode
Operational
Interface：
Default： 0x0000
Control
Mode：
Range： 0x0000 ~ 0x0001
Data Size： 16-bit
Format： Hexadecimal
Settings： Please refer to Table 8.1 for digital input setting.
P2-51 Reserved
Setting Value
18
19
1A
1B
1C
1D
1E
1F
Panel / Software
PT
Unit： -
When you set digital input (DI) as CCLR, the function of pulse clear is
effective. Clear the position error (It is applicable in PT and PR modes).
If this DI is ON, the accumulative position error will be cleared to 0.
0: CCLR is rising-edge triggered.
1: CCLR is action-level triggered.
Speed Estimation Bandwidth (Hz)
350
300
250
200
175
150
125
100
Communication
Chapter 8 Parameters
Address: 0264H
0265H
Related Section: -
8-117