NXP Semiconductors PN7462 series User Manual page 40

NXP Semiconductors
Fig 16. PN7462 family basic schematic
6.2.1 Low Drop-Out regulators
The PMU embeds several Low Drop-Out regulators (LDO) in order to ensure the stability
of the power supply.
6.2.1.1 Main LDO
The Main LDO (MLDO) provides 1.8 V for all internal analog, digital and memory
modules. It draws its power from VBUS. It includes a current limiter to prevent damage of
output transistors. The output supply is available on the VDD pin, which must be
connected externally to the DVDD pin.
UM10858
User manual
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
40 of 345