Pn7462 Family Contact Interface; Contact Interface Features - NXP Semiconductors PN7462 series User Manual

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NXP Semiconductors

13. PN7462 family Contact interface

Note: This chapter only applies to family members with contact and/or ISO7816
interface.
The PN7462 family integrates contact interface to enable communication with ISO7816
and EMVCo contact smart cards, without the need for an external contact front end. It
offers a high level of security for the cards by performing current limitation, short-circuit
detection, ESD protection as well as supply supervision.
PN7462 family also offer the possibility to extend the number of contact interfaces
available, using an I/O Aux interface to connect a slot extension (TDA8007 - 2 slots,
TDA8020 - 2 slots, TDA8026 - 5 slots).

13.1 Contact interface features

• Support of Class A (5), Class B (3 V) and Class C (1.8 V) contact smart cards
• Compliant with ISO7816 and EMV Co 4.3 standards
• Protection of the smart card
• DC-to-DC converter for VCC generation to enable support of Class A and Class B
• Built-In debouncing on card presence contact
• Card Clock generation up to 13.56 MHz using the external crystal oscillator
• Specific ISO UART with APB access for automatic convention processing, variable
• FIFO 1 to 32 characters in both reception and transmission mode
• Parity error counter in reception mode and transmission mode with automatic re-
• Cards clock stop (at HIGH or LOW level)
• Automatic activation and deactivation sequence through a sequencer
UM10858
User manual
COMPANY PUBLIC
− Thermal and current limitation in the event of short-circuit (pins I/O, VCC)
− Vcc regulation: 5 V, 3 V, and 1.8 V
− Automatic activation and deactivation sequences initiated by software, or by
hardware in the event of a short-circuit, card take-off, overheating, falling of
PN7462 family supply
− Enhanced card-side Electro Static Discharge (ESD) protection of (>12 kV)
− Supply supervisor for killing spikes during power on and off
cards with low input voltages
(27.12MHz) with synchronous frequency changes of fXTAL/2, fXTAL/3, fXTAL/4,
fXTAL/5, fXTAL/6, fXTAL/8, fXTAL/16
baud rate through frequency or division ratio programming, error management at
character level for T=0 and extra guard time register
transmission
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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