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NXP Semiconductors
Name
BYTECOUNT_STATUS_REG
STATUS_REG
CONTROL_REG
[2]
[3]
INTERNAL_USE
[3]
INTERNAL_USE
TX_DATA
RX_DATA
INT_CLR_ENABLE_REG
INT_SET_ENABLE_REG
INT_STATUS_REG
INT_ENABLE_REG
INT_CLR_STATUS_REG
INT_SET_STATUS_REG
[1]
Read-Only Register Access during I2C Transmission/Reception is on-going.
[2]
Write Set Only Register Access: Once the bit is set, the I2C transmission or reception starts and once the I2C transmission or
reception is completed the bit field is automatically cleared. Writing 1 to bit field during an active I2C transmission or reception
has no effect.
[3]
Bit-field are either set by HAL or use default value from CLIF EEPROM default settings
UM10858
User manual
COMPANY PUBLIC
Address
Width
Access
offset
(bits)
0x0018
32
R
0x001C
32
R
0x0020
32
W
0x0024
32
RW
0x0028
32
R
0x0040
32
W
0x0044
32
W
0x0048
32
W
0x004C
32
W
0x0050
32
R
0x0054
32
R
0x0058
32
R
0x005C
32
R
0x3FD8
32
W
0x3FDC
32
W
0x3FE0
32
R
0x3FE4
32
R
0x3FE8
32
W
0x3FEC
32
W
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Reset value
Description
0x00000000
Register bit field to indicate the status of
number of bytes transmitted or received
0x0000002C
Register bit fields to indicate the current status
of the I2C master
0x00000000
Register bit field to enable the I2C
Transmission or reception.
0x00000000
For internal use
0x00000000
For internal use
0x00000000
These register fields are used to fill the FIFO
with the data to be transmitted & accessible as
0x00000000
write only registers; if I2C Master is configured
0x00000000
for I2C Transmission.
0x00000000
These register fields are used to read the
0x00000000
received data from FIFO & accessible as read
0x00000000
only registers; if I2C Master is configured for
0x00000000
I2C Reception.
0x00000000
0x00000000
Collection of Clear Interrupt Enable
commands
0x00000000
Collection of Set Interrupt Enable commands
0x00000000
Collection of Interrupt Status
0x00000000
Collection of Interrupt Enable
0x00000000
Collection of Clear Interrupt Status commands
0x00000000
Collection of Set Interrupt Status commands
UM10858
© NXP B.V. 2018. All rights reserved.
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