NXP Semiconductors PN7462 series User Manual page 123

NXP Semiconductors
Table 140. CRC_DAT32_REG (address offset 0x04)
Bit Symbol
31:0 CRCDAT32
Table 141. CRC_DAT16_REG (address offset 0x08)
Bit Symbol
31:16 RESERVED
15:0 CRCDAT16
Table 142. CRC_DAT8_REG (address offset 0x0C)
Bit Symbol
31:8 RESERVED
7:0 CRCDAT8
Table 143. CRC_DAT_CALC_REG (address offset 0x10)
Bit Symbol
31:0 CRCDAT_CALC
Table 144. CRC_DAT_PRELOAD_REG (address offset 0x14)
Bit Symbol
31:0 CRCDAT_PRELOAD
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Access Value Description
R/W 0, 1 for each 32 bits CRC value.
bit
Writing to CRCDAT32 triggers a new CRC calculation over a 32 bits
written word. Reading from CRCDAT32 returns the currently
addressed CRC byte (see CRCCON).
Access Value Description
- 0 Reserved
R/W 0,1 for each 16 bits CRC value.
bit
Writing to CRCDAT16 triggers a new CRC calculation over the 16
bits written word. Reading from CRCDAT16 returns the currently
addressed CRC byte (see CRCCON).
Access Value Description
- 0 Reserved
R/W 0,1 for each 8 bits CRC value.
bit
Writing to CRCDAT8 triggers a new CRC calculation over the 8 bits
written word. Reading from CRCDAT8 returns the currently addressed
CRC byte (see CRCCON).
Access Value Description
R 0,1 for each CRCDAT_CALC[31:0]: 32bits CRC calculated value in CRC32 mode.
bit
CRCDAT_CALC[15:0]: 16bits CRC calculated value in CRC16 mode.
Access Value
R/W 0,1 for each bit
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Description
32bits CRC preload value.
Writing to CRCDAT_PRELOAD automatically preloads the
CRC data register with the 32 bits written word. Reading
from CRCDAT_PRELOAD returns the previously written
preload value. Preloading the internal CRC shift register
takes one clock cycle.
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