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NXP Semiconductors
comply with ISO14443 Type A and B, ISO18092, FeliCa, ISO15693, Jewel, and I-Code
EPC-V2 (ISO18000).
12.4.8.1 Functional features
• Supports different preset values of the CRC register
• Supports 5-bit and 16-bit CRC calculation
• Supports inverted CRC output
12.4.9 Analog Control Block
The Analog Control block is responsible for switching correctly analog control signals
depending on the actual system state.
12.4.10 RF Control Block
The RF Control block is responsible for switching on/off of the analog drivers. To be
compliant with the ISO18092 specification for peer-to-peer communication special guard
times (T
is handled as well if enabled by software.
RF Control block contain analog Level detector. Status indication for external field
detection is performed by analog Level detector. This is necessary on the one hand to
know whenever an external field is present in card mode and other hand to avoid
overlapping with an external field when the ICs driver shall be activated. The external
field indication includes masking a self-generated RF-Field (which is detected by analog
level detector too) as well as RF clock frequency checking. As the analog level detector
has a latency of approximately 15 us. It is necessary to mask the analog level detect
signal to avoid external field indication after a detected RF-Field disappeared. A period of
25 us is implemented in the RFControl module for masking to level detector signal. This
corresponds to 512 HFO clock cycles (nominal 20 MHz).
12.4.11 Automatic Gain Control (AGC) block
The AGC is used to control the analog Rx-Divider in order to keep the RX-voltage level
constant, i.e., ideally independent of the field strength. Consequently, the full dynamic
range of the ADC can be exploit and also the performance of the analog demodulators is
increased.
12.4.12 Card Mode Activation (CMA) Block
The CMA module manages the Type-A activation flow including all state transitions from
IDLE state to ACTIVE state. If enabled, it interacts with all necessary modules to handle
the activation process fully automated. When reaching the ACTIVE state an IRQ flag is
set and the control is handed over to software. After reaching the ACTIVE state, the
firmware disables the CMA.
UM10858
User manual
COMPANY PUBLIC
/T
) are handled. Collision avoidance - variation of the guard waiting time –
IDT
ADT
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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