NXP Semiconductors PN7462 series User Manual page 295

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NXP Semiconductors
Bit
15
14
13
12:0
HOSTIF_HSU_CONTROL_REG
This register is used for the HSU Sample Clock.
Table 329. HOSTIF_HSU_SAMPLE_REG (address offset 0x0018)
Bit
31:22
21:11
10:0
HOSTIF_HSU_CONTROL_REG
This register is used for the HSU estimated clock dividers.
Table 330. HOSTIF_HSU_EST_CLOCK_DIVIDER_REG (address offset 0x001C)
Bit
31:14
13
12:0
HOSTIF_HSU_EST_CLOCK_CORRECT_REG
This register is used for the HSU estimated clock correction.
UM10858
User manual
COMPANY PUBLIC
Symbol
Access
HSU_WAKEUP_STAN
R/W
DBY
HSU_STOPBIT
R/W
HSU_TX_DIVIDER
R/W
HSU_RX_DIVIDER
R/W
Symbol
Access
RESERVED
R
HSU_TX_CLK_CORR
R/W
ECT
HSU_RX_CLK_CORR
R/W
ECT
Symbol
RESERVED
HSU_EST_TX_DIVIDER
HSU_EST_RX_DIVIDER
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Reset
Description
Value
0
1: simulate reception of bytes lost during
wakeup from standby phase (number of
bytes specified in
HSU_WAKEUP_BYTES). Can only be
used once
0
0: 1 stop bit
1: 2 stop bits
0
0: use HSU_RX_DIVIDER
1: use HSU_RX_DIVIDER+1
0
Clock divider for RX sampling
Reset
Description
Value
0
Reserved
0
Used to correct clock division. If
TX_CLK_CORRECT[i]=1, then duration of
bit[i] will be extended of one clock cycle
0
Used to correct clock division. If
RX_CLK_CORRECT[i]=1, then duration of
bit[i] will be extended of one clock cycle
Access
Reset
Description
Value
R
0
Reserved
R
0
Estimated clock divider for TX sampling:
0: use HSU_EST_RX_DIVIDER
1: use HSU_EST_RX_DIVIDER + 1
R
0
Estimated clock divider for RX sampling
UM10858
© NXP B.V. 2018. All rights reserved.
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