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NXP Semiconductors
12.4.13 MFC Block
The MFC (MIFARE Classic Crypto) block generates the cryptographic data to encipher
and decipher data for communication with MIFARE Classic cards and MIFARE Plus
cards in SL1. It is supported by a dedicated PRNG.
12.4.13.1 Functional features
• authentication for MIFARE product-based PCD and PICC
• encryption and decryption for MIFARE products
• pseudo random number generation (PRNG)
12.4.14 Timers
There are three general purpose timers T0, T1 and T2 running with the CLIF clock and
one additional timer, T3, operating on HFO (~ 20MHz) or LFO (~ 375 kHz).
RF Timers: Timers T0, T1 and T2 have 20 bits and may be operated at clock
frequencies derived from the 13.56MHz system clock.
Additional Timer: Timer T3 has 20 bits and can be operated with the LFO (~375 kHz) or
the HFO (~20MHz) clock. Note that this timer requires the RF clock (clk13) to be
functional.
At expiration of the timer a flag is raised and an IRQ is triggered. Refer to the Register-
Set specifications for details on the IRQ handling.
12.4.14.1 Functional features
Timers T0, T1 and T2
• 20-bit
• Runs on RF clock
• The 13.56 MHz RF clock may be divided by 2, 4, 8, 16, 32, 64, 128, and 256
• Several Start events: Start now, Start on external RF field on/off, Start on Rx/Tx
• Reload
• IRQ is triggered at expiration
Timer T3 for oscillator trimming
• 20-bit
• Start -event: Start now
• Runs on HFO or LFO clock
UM10858
User manual
COMPANY PUBLIC
started/ended, Start on timer T3 running,
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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