NXP Semiconductors PN7462 series User Manual page 226

NXP Semiconductors
Bit Symbol Access
13.6.2.17 Register ct_tor1_reg (Time-Out Register 1)
This configuration register enables to program the value of an 8-bit ETU counter used to
check some timings (CWT, BWT...).
Table 265. ct_tor1_reg (address 004Ch) bit description
Bit Symbol Access
31:8 RESERVED -
7:0 TOL7 - TOL0 W
13.6.2.18 Register ct_tor2_reg (Time-Out Register 2)
This configuration register enables to program the value of an 8-bit ETU counter used to
check some timings (CWT, BWT...).
Table 266. ct_tor2_reg (address 0050h) bit description
Bit Symbol Access
31:8 RESERVED -
7:0 TOL15 - TOL8 W
13.6.2.19 Register ct_tor3_reg (Time-Out Register 3)
This configuration register enables to program the value of an 8-bit ETU counter used to
check some timings (CWT, BWT...).
Table 267. ct_tor3_reg (address 0054h) bit description
Bit Symbol
31:8 RESERVED
7:0 TOL24 – TOL16
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Reset Description
Value
- In case of word access (bit wrdacc = 1 in register ct_ucr2_reg), 4 bytes are
written into the FIFO:
UTR31 - UTR24: byte 4 (last byte to transmit)
UTR23 - UTR16: byte 3
UTR15 - UTR8 : byte 2
UTR7 - UTR0 : byte 1 (first byte to transmit)
Synchronous card:
In transmission mode, the data (UTR0) is written on the I/O line of the card
when register ct_utr_reg has been written to; the FIFO is bypassed.
Reset Description
Value
0 reserved
0000 Time-Out Latched
0000b Programmable 8-bit ETU counter (see register ct_toc_reg).
Reset Description
Value
0 reserved
0000 Time-Out Latched
0000b Programmable 8-bit ETU counter (see register ct_toc_reg).
Access Reset Description
Value
- 0 reserved
W 0000 Time-Out Latched:
0000b Programmable 8-bit ETU counter (see register ct_toc_reg).
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Rev. 1.4 — 14 May 2018
314514
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PN7462 family HW user manual
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