Table of Contents
Advertisement
NXP Semiconductors
14.3.1.3 Configuring the I2C interface
The following parameters can be configured via the register
HOSTIF_I2C_CONTROL_REG (see
• I2C slave address (2 LSBs)
• High-speed mode (will select high speed mode of pads). Fast mode and standard
• I2C soft reset enable
• I2C Device ID enable
The Host Interface ensures that changes to these parameters will not take effect while
output from the Host Interface is BUSY (logic high).
14.3.1.4 Clock requirements
The I2C block uses the system clock to generate the request lines for data exchange.
The main I2C functionality is done with the clock supported via the SCL pin. Two 25 ns
filters are needed: one each for Start and Stop bit detection.
14.3.1.5 Transfer speed
The host interface supports Standard-mode (Sm), Fast-mode (Fm) and High-speed
mode (Hs-mode). Each mode is half-duplex only. The bitrate speeds for each mode are
listed in the following table.
Table 313. I2C Mode Maximum Bitrates
Mode
Standard-mode (Sm)
Fast-mode (Fm)
High-speed mode (Hs-mode)
There is no difference in functionality between Standard-mode and Fast-mode; only the
frequency of SCL changes. To enable High-speed mode, set bit I2C_HS_ENABLE in
register HOSTIF_I2C_CONTROL_REG. With this bit set, the Host Interface responds
with an ACK to the slave address following the High-speed mode, Master Code and
Repeated Start sequence. In addition, the output port is set logic high to drive the I2C
pads in the correct configuration. The I2C interface does not support clock stretching.
14.3.1.6 I2C address
The upper bits of the I2C slave address are hardcoded. The value corresponds to the
NXP identifier for I2C blocks. The value is 01010XXb. The lower two bits are defined via
field I2C_ADDR in register HOSTIF_I2C_CONTROL_REG. The 10-bit addressing is not
supported.
14.3.1.7 ACK/NACK behavior
The following sections describe the conditions under which the I2C block generates a
NACK/ACK.
Host write to I2C:
The slave address+W will be ACKed provided that:
• Selected host interface is I2C
UM10858
User manual
COMPANY PUBLIC
mode are both enabled by default
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Table
323):
314514
UM10858
PN7462 family HW user manual
Max Bitrate
100 kbit/s
400 kbit/s
3.4 Mbit/s
© NXP B.V. 2018. All rights reserved.
267 of 345
Advertisement
Table of Contents
