NXP Semiconductors PN7462 series User Manual page 310

NXP Semiconductors
Bit
24
23
22
21
20:17
16
15
14:11
10:7
6
5
4
3:0
UM10858
User manual
COMPANY PUBLIC
Symbol Access
AHB_WR_SLOW_EN W
ABLE
AHB_RD_SLOW_ENA W
BLE
AHB_ERROR_ENABL W
E
WATERLEVEL_REAC
W
HED_ENABLE
RX_BUFFER_OVERF W
LOW_ENABLE
CRC_NOK_ENABLE W
TX_TIMEOUT_ENABL W
E
RX_FRAME_OVERFL W
OW_ENABLE
RX_FRAME_UNDERF W
LOW_ENABLE
TX_FRAME_NOT_AVAI W
LABLE_ENABLE
RX_BUFFER_NOT_A W
VAILABLE_ENABLE
EOT_ENABLE W
EOR_ENABLE W
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Reset Description
Value
0 Slow AHB during write operation interrupt
enable
0 Slow AHB during read operation interrupt
enable
0 Ahb_error (hresp=1, or address overflow)
interrupt enable
0 Water level reached interrupt enable
0 0001 - Maximum buffer size exceeded
interrupt enable for RX buffer 0
0010 - Maximum buffer size exceeded
interrupt enable for RX buffer 1
0100 - Maximum buffer size exceeded
interrupt enable for RX buffer 2
1000 - Maximum buffer size exceeded
interrupt enable for RX buffer 3
0 Data-link layer CRC error interrupt enable
0 Inter-character timeout (TIC) exceeded on
transmitted frame interrupt status
0 0001 - Frame overflow interrupt enable for
RX buffer 0
0010 - Frame overflow interrupt enable for
RX buffer 1
0100 - Frame overflow interrupt enable for
RX buffer 2
1000 - Frame overflow interrupt enable for
RX buffer 3
0 0001 - Frame underflow interrupt enable
for RX buffer 0
0010 - Frame underflow interrupt enable
for RX buffer 1
0100 - Frame underflow interrupt enable
for RX buffer 2
1000 - Frame underflow interrupt enable
for RX buffer 3
0 HOSTIF_DATA_READY_STATUS_REG.T
X_DATA_READY=0 when host read
request interrupt enable
0 No receive buffers available interrupt
enable
0 EOT interrupt enable
0 0001 - EOR interrupt enable for RX buffer
0
0010 - EOR interrupt enable for RX buffer
1
UM10858
© NXP B.V. 2018. All rights reserved.
310 of 345