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14.3.2.7 Response to SPI Host Write
The Host Interface does not assert Data Ready to the Buffer Manager and discards the
frame in response to a Host Write unless all of the following conditions are met:
• Selected host interface is SPI
• Input port go is logic high
• RX buffer is available
• No frame overflow
• No buffer overflow
Note that in Native mode, frame overflow is not applicable.
14.3.2.8 Response to SPI Host Read
The Host Interface returns 0xFF back to the Host and does not assert Data Request to
the Buffer Manager in response to a Host Read unless all the following conditions are
met:
• Selected host interface is SPI
• TX buffer contains a frame
14.3.2.9 SPI protocol detection
The SPI protocol is synchronous with the SCK clock based on the system clock, which is
fixed at 27.12 MHz.
Data Request:
Data Ready:
UM10858
User manual
COMPANY PUBLIC
Fig 60. SPI Native Mode (full duplex)
Signal Data Request is asserted after the changing edge of the last bit.
Signal Data Ready is asserted after the sampling edge of the last bit.
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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