NXP Semiconductors PN7462 series User Manual page 167

NXP Semiconductors
Bit Symbol
19 RX_PARITY_ERR_8
BITS_E NABLE
18:16 RX_BIT_ALIGN
15:8 RX_EOF_SYMBOL
7 RESERVED
6 RX_EOF_TYPE
5:4 RX_STOP_CONDITI
ON
3 RX_MSB_FIRST
2 RX_STOPBIT_ENAB
LE
1 RX_PARITY_TYPE
UM10858
User manual
COMPANY PUBLIC
Access Value
R/W 0*, 1
R/W 0* - 7h
D 0* - FFh
R 0
D 0*, 1
0
1
D 00b*-11b
00b
01b
10b
11b
D 0*, 1
D 0*, 1
D 0, 1*
0
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Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Description
If set, parity error is detected when only 8 bits in last byte
received
RxAlign defines the bit position within the byte for the first bit
received. Further received bits are stored at the following bit
positions.
This value defines the pattern of the EOF symbol. Note: All
bits are clear upon enabling of the receiver if the automatic
mode detection is enabled. If in such a case an ISO14443A
communication is detected bit0 is set by the mod-detector.
Reserved
Defines the EOF handling, modified by the mode-detector
EOF as defined in the register field RX_EOF_SYMBOL is
expected.
EOF as defined in ISO14443B is expected.
This bit field defines the condition to stop a reception.
Note: This bit is set by the mod-detector if automatic mode
detection is enabled and the corresponding communication
is detected.
Reception is stopped only if end of data communication is
detected by the signal processing Note: This value is set by
the mode-detector if a ISO14443A communication is
detected
Reception is stopped upon reception of the EOF pattern
selected by the register field RX_EOF_TYPE and
RX_EOF_SYMBOL
Note: This value is set by the mode-detector if an
ISO14443B communication is detected
Reception is stopped on detection of an incorrect parity bit.
Reception is stopped if the number of received bytes
reaches the defined frame length (which extracted from the
first data-byte received).
Note: This value is set by the mod-detector if a FeliCa
communication is detected
If set to 1, data bytes are interpreted MSB first for
reception
Set to 1, a stop-bit is expected and will be checked and
extracted from data stream.
Note: The stop-bit is not configurable and fixed to a logic 1.
Note: This bit is set by the mod-detector if automatic mode
detection is enabled and ISO14443B communication is
detected.
Defines which type of the parity-bit is used
Note: This bit is set by the mod-detector if automatic mode
detection is enabled and ISO14443A communication is
detected.
Even parity calculation is used
UM10858
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