NXP Semiconductors PN7462 series User Manual page 109

NXP Semiconductors
Table 127. PCR_SELECT_SYSTEMCLOCK_REG (address offset 0xEC)
Bit Symbol
31:3 RESERVED
2:0
SELECT_SYSTEMCLOCK
Table 128. PCR_ADV_RFLD_REG (address offset 0xF0)
Bit Symbol
31:25 RESERVED
24:20 ADV_RFLD_IBIAS_TIME
19
ADV_RFLD_BYPASS_FRE
Q_CHECK
18
ADV_RFLD_BYPASS
17:16 ADV_RFLD_PREAMP_GAI
N
15:12
ADV_RFLD_CLKREC_TIM
E
11:7
ADV_RFLD_WAIT_TIME
6:0
ADV_RFLD_SLEEP_TIME
Table 129. PCR_ADV_RFLD_TEST_REG (address offset 0xF4)
Bit Symbol
31:3 RESERVED
2
ADV_RFLD_TEST_BYPAS
S_FIELDDET
1
ADV_RFLD_TEST_PREAM
P_ENABLE
UM10858
User manual
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Access Value Description
rw 0x00 Reserved
Selects the clock source
001: clkHFO (20 MHz)
010: clkUSBPLL/2 (24 MHz) (internal test purpose)
100: clkXtal (27.12 MHz) (internal test purpose)
rw 0x01 Others: INVALID
Access Value Description
rw 0x00 Reserved
rw 0x00 Ibias Boot up Time
bypass the digital frequency check in case of malfunction
of frequency check
rw 0x00 1: Disable Frequency check during RF level detection
enable Bypass for pre-amplifier. To be set if normal RF
Level detector is used for
rw 0x00 1: Disable Pre-Amplifier
rw 0x00 gain setting for pre-amplifier
boot up time for clock recovery. Defines time between
switching on the clock recovery until frequency check is
rw 0x00 enabled
boot up time for advanced RF level detector. Defines
time between switching on the RF level detector until
rw 0x00 field is checked.
defines the sleep Time (# LFO cycles) in the polling
circuit where the Advanced RF Level Detector is
rw 0x00 switched off.
Access Value Description
rw 0x00 Reserved
bypass the field detection during SLEEP time
1: Bypass field detection during SLEEP time
rw 0x00 0: Field detection enabled during SLEEP time
Enables the advanced RF level detector during standby
mode. The RF level detector as wake-up source must be
enabled to use this feature.
1: Enable Pre-amplifier
rw 0x00 0: Disable Pre-amplifier for RF level detection
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Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
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