NXP Semiconductors S32G-VNP-GLDBOX Reference Manual
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NXP Semiconductors S32G-VNP-GLDBOX Reference Manual

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S32G-VNP-GLDBOX
Reference Manual
Version: 0.4
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Summary of Contents for NXP Semiconductors S32G-VNP-GLDBOX

  • Page 1 S32G-VNP-GLDBOX Reference Manual Version: 0.4...

  • Page 2: Table Of Contents

    Contents Introduction Acronyms and abbreviations Related documentation Board version S32G-VNP-GLDBOX Hardware Hardware resources Block diagram PCB specification Top view Connectors Buttons Power switch DIP Switches Jumpers 2.10 LEDs Functional Descriptions Power supply Boot Reset Clocks JTAG Connections Aurora Trace External Memory and Storage 3.7.1...
  • Page 3 3.11 LIN and UART 3.12 FlexRay 3.13 DSPI 3.14 3.15 Cables Description Revision History...
  • Page 4 Table 6. The connectors of the S32G-VNP-GLDBOX ..........12 Table 7. The buttons of the S32G-VNP-GLDBOX ............ 13 Table 8. The power switch of the S32G-VNP-GLDBOX ........13 Table 9. DIP switches on the S32G-VNP-GLDBOX ..........14 Table 10. The configurations of boot mode ..............17 Table 11.
  • Page 5 Figure 1. The block diagram of S32G-VNP-GLDBOX ..........10 Figure 2. The top view of S32G-VNP-GLDBOX ............11 Figure 3. The power supply block diagram of S32G-VNP-GLDBOX REV D 20 Figure 4. Boot mode pins ...................... 21 Figure 5. RCON pins ....................... 22 Figure 6.

  • Page 6: Introduction

    Introduction The S32G-VNP-GLDBOX is a compact, highly-optimized and integrated reference design board based on the S32G274A Vehicle Network Processor. With the high-performance computing capacity and rich input/output(I/O) of the S32G274A, this board is suitable for a variety of typical automotive applications, such as service-oriented gateway, vehicle central computing nodes, domain controller, safety controller, black-box, smart antenna, FOTA etc.

  • Page 7: Related Documentation

    Ultra Secured Digital Host Controller Related documentation The table below lists the documents that can be referred to for more information on the S32G-VNP-GLDBOX. Some of the documents listed below may be available only under a non-disclosure agreement (NDA). To request access to these documents, please contact your local field applications engineer (FAE) or sales representative.

  • Page 8: Board Version

    Changed the supply voltage of U108 (PPF5020AMBADES). Changed R229 from 68.1K to 62K, R244 from 22K to 27K for board version identification. The assembly version of the S32G-VNP-GLDBOX is printed on the label which is usually pasted on the bottom side of the PCB.

  • Page 9: S32G-Vnp-Gldbox Hardware

    S32G-VNP-GLDBOX Hardware This section describes the hardware resources, specifications and mechanical information of the S32G-VNP- GLDBOX. Hardware resources The hardware resources of the S32G-VNP-GLDBOX are listed as below. Table 4. Hardware resources Items Resources Description • 4 Arm Cortex-A53 cores (with optional cluster lockstep) •...

  • Page 10: Block Diagram

    Tips: When M.2 M-key card is inserted, M.2 E-key slot will not be available, and vice versa. Connector PCIe x1 1 x PCIe x1 socket socket Block diagram The figure below shows the block diagram of the S32G-VNP-GLDBOX. 12V Power Supply Input Port SD Card Port Multi-Function Port Automotive Bus Port UART1 Port...

  • Page 11: Pcb Specification

    PCB specification The table below lists the specifications of the S32G-VNP-GLDBOX PCB. Table 5. S32G-VNP-GLDBOX PCB specifications Items Specifications Ambient temperature ~ 35° C, Lab environment PCB dimensions 180mm x 140mm Top view The figure below shows the top view of the S32G-VNP-GLDBOX.

  • Page 12: Connectors

    Connectors The table below lists the connectors of the S32G-VNP-GLDBOX. Please refer to the schematic for more detail. Table 6. The connectors of the S32G-VNP-GLDBOX Part Connector type Description Typical connection USB 2.0 Micro-AB Console port (UART1) Connects to host computer.

  • Page 13: Buttons

    RESET_B S32G274A will perform functional reset. SW16 Press SW16 to assert non-maskable interrupt. Power switch The table below describes the power switch of the S32G-VNP-GLDBOX. Table 8. The power switch of the S32G-VNP-GLDBOX Switch Default setting Description The SW15 is an SPDT switch.

  • Page 14: Dip Switches

    If the actuator is moved to POS. 2, the board power supply is turned off. If the actuator is moved to POS. 3, the power supply is input from the connector(J5-pin2) DIP Switches The table below describes the DIP switches on the S32G-VNP-GLDBOX. Table 9. DIP switches on the S32G-VNP-GLDBOX Switch Default setting...
  • Page 15 ON : S32G274A Fuse word BOOT_CFG1[7] = 1 SW4[8] OFF: S32G274A Fuse word BOOT_CFG1[7] = 0 ON : S32G274A Fuse word BOOT_CFG1[8] = 1 SW5[1] OFF: S32G274A Fuse word BOOT_CFG1[8] = 0 ON : S32G274A Fuse word BOOT_CFG1[9] = 1 SW5[2] OFF: S32G274A Fuse word BOOT_CFG1[9] = 0 ON : S32G274A Fuse word BOOT_CFG1[10] = 1...
  • Page 16 ON : S32G274A Fuse word BOOT_CFG1[26] = 1 SW7[3] OFF: S32G274A Fuse word BOOT_CFG1[26] = 0 ON : S32G274A Fuse word BOOT_CFG1[27] = 1 SW7[4] OFF: S32G274A Fuse word BOOT_CFG1[27] = 0 ON : S32G274A Fuse word BOOT_CFG1[28] = 1 SW7[5] OFF: S32G274A Fuse word BOOT_CFG1[28] = 0 ON : S32G274A Fuse word BOOT_CFG1[29] = 1...

  • Page 17: Jumpers

    The table below describes the boot mode configuration of S32G-VNP-GLDBOX.. Table 10. The configurations of boot mode SD Boot Setting NOR Flash Boot Serial Boot Switch eMMC Boot Setting (default) Setting Setting 7-ON, REST-OFF 6,7-ON, REST-OFF ALL-OFF ALL-OFF ALL-OFF ALL-OFF...

  • Page 18: Leds

    2-3 Shorted : Connect the VCCQ power rail of eMMC to 1.8V. Note: The S32G-VNP-GLDBOX REVC does not contain J185, J186, J187. 2.10 LEDs The table below describes the LEDs on the S32G-VNP-GLDBOX. Table 12. LEDs on the S32G-VNP-GLDBOX Color...

  • Page 19: Functional Descriptions Power Supply

    Functional Descriptions Power supply The power supply of the S32G-VNP-GLDBOX is comprised of two parts: the external 12V AC-DC power adapter and the onboard PMIC. The specifications of the 12V AC-DC power adapter are listed below: • Input: 110-240V AC, 50/60 Hz •...

  • Page 20: Figure 3. The Power Supply Block Diagram Of S32G-Vnp-Gldbox Rev D

    U86 (AQR113C) VA10; V10_SRDS DNP or NC AQR_2V0 U108 ( PF5020 ) BUCK3 U86 (AQR113C) VA20; V20_SRDS AQR_3V3 U108 ( PF5020 ) LDO1 U86 (AQR113C) VDD_IO; U89 (Flash) VCC Figure 3. The power supply block diagram of S32G-VNP-GLDBOX REV D...

  • Page 21: Boot

    S32G2 booting. By default, the FUSE_SEL fuses of the S32G2 are not blown therefore the S32G-VNP-GLDBOX shipped from the factory only supports two boot modes: serial boot mode and boot from RCON. The figure below shows the related circuit of the boot mode pin0 and pin1.

  • Page 22: Table 13. Values Of The Boot Mode Pins

    Table 13. Values of the boot mode pins Switch Setting Value of the boot mode pin 1-OFF,2-OFF Boot mode pin1 (BOOTMOD1) value: 0 1-ON, 2-OFF Boot mode pin1 (BOOTMOD1) value: 1 1-OFF,2-ON Boot mode pin1 (BOOTMOD1) value: RESET_B 1-ON, 2-ON Boot mode pin1 (BOOTMOD1) value: INV_RESET_B 1-OFF,2-OFF Boot mode pin0 (BOOTMOD0) value: 0...

  • Page 23: Reset

    RCON pins. Reset The S32G-VNP-GLDBOX has two optional hardware-triggered reset sources: POR_RESET and RESET_B. POR_RESET (pressing SW1) can initiate a power-on reset for S32G274A. RESET_B (pressing SW2) can initiate an external reset for S32G274A. As shown in the figure below, Except the entire board reset, the SJA1110 can also be reset by S32G274A GPIO , and the Ethernet PHYs can also be reset by S32G274A GPIOs or SJA1110 GPIO.

  • Page 24: Clocks

    Clocks The S32G274A has multiple clock sources: FIRC, SIRC, FXOSC, PLL and DFS. The S32G-VNP-GLDBOX has a 40 MHz crystal oscillator as FXOSC along with the FIRC and SIRC of the internal clock sources in S32G274A. The PLL and DFS can be enabled and configured through software. The figure below shows the clock tree of S32G-VNP-GLDBOX.

  • Page 25: Jtag Connections

    JTAG Connections The S32G-VNP-GLDBOX has a 20-pin JTAG slot for S32G274A and a 10-pin JTAG slot for SJA1110. User can connect a debugger (such as Lauterbach or S32 Debug Probe) to S32G274A through the 20-pin JTAG slot. Similarly, user can connect a debugger to SJA1110 through the 10-pin JTAG slot.

  • Page 26: Nor Flash

    Figure 9. Connection between S32G274A and the NOR flash chip 3.7.3 SD/eMMC The S32G274A uSDHC module on the S32G-VNP-GLDBOX can connects to the SD card or the eMMC, and user can change the connection through SW3. The figure below shows the connections between the S32G274A and SD/eMMC.

  • Page 27: Serdes Interfaces

    When SW3 is ON, SD card is selected; When SW3 is OFF, the eMMC card is selected. SerDes interfaces The S32G274A on the S32G-VNP-GLDBOX has two independent SerDes modules, and each of them supports two lanes. The S32G-VNP-GLDBOX supports both SGMII mode and PCIe mode.

  • Page 28: Ethernet

    IEEE 802.3-2015, and the PFE of S32G2 offloads the processing of Ethernet packets from the host cores and can provide higher performance and lower power than pure software processing can achieve. The figure below is the Ethernet Connection Diagram of the S32G-VNP-GLDBOX.

  • Page 29: Automotive Ethernet Switch

    3.9.1 Automotive Ethernet switch The S32G-VNP-GLDBOX has an automotive Ethernet switch SJA1110 which mainly comprises of a configurable Ethernet switch and a programmable M7 core. Except the Ethernet ports and SMI bus port, the SJA1110 also has a QuadSPI port, a SPI_HOST port and a SPI_AP port.

  • Page 30: Ethernet Phys

    S32G274A GMAC0 RGMII 1000BASE-T AQR113C S32G274A PFE_MAC1 SGMII AQR113C supports multiple speeds. Note: 1. In the S32G-VNP-GLDBOX REVD, U86 is AQR113C and in the S32G-VNP-GLDBOX REVC, U86 is AQR107. 2. The PHYs inside SJA1110 are not listed in the table above.

  • Page 31: Smi Interface

    PHY6(P10) 0X0E U57 AR8035 0X04 SJA1110 SMI_OUT_MDC SMI_OUT_MDIO U56 AR8035 0X05 3.10 The table below describes the CAN PHY connections on the S32G-VNP-GLDBOX. Table 20. CAN PHY connections CAN PHY Connections Signal U43 S32G274A PC_12 LLCE_CAN0_TXD U43 S32G274A PC_11 LLCE_CAN0_RXD...
  • Page 32 U43 S32G274A PJ_02 LLCE_CAN1_RXD U24 PCAL6524HEAZ P0_1 LLCE_CAN01_EN U24 PCAL6524HEAZ P0_0 LLCE_CAN01_STB U43 S32G274A PJ_03 LLCE_CAN2_TXD U43 S32G274A PJ_04 LLCE_CAN2_RXD TJA1043 U24 PCAL6524HEAZ P0_3 LLCE_CAN2_EN U24 PCAL6524HEAZ P0_2 LLCE_CAN2_STB U43 S32G274A PJ_05 LLCE_CAN3_TXD U43 S32G274A PJ_06 LLCE_CAN3_RXD TJA1043 U24 PCAL6524HEAZ P0_5 LLCE_CAN3_EN U24 PCAL6524HEAZ...
  • Page 33 U43 S32G274A PK_03 LLCE_CAN10_TXD U43 S32G274A PK_04 LLCE_CAN10_RXD TJA1043 U24 PCAL6524HEAZ P1_5 LLCE_CANAB_EN U24 PCAL6524HEAZ P1_4 LLCE_CANAB_STB U43 S32G274A PK_05 LLCE_CAN11_TXD U43 S32G274A PK_06 LLCE_CAN11_RXD TJA1043 U24 PCAL6524HEAZ P1_5 LLCE_CANAB_EN U24 PCAL6524HEAZ P1_4 LLCE_CANAB_STB U43 S32G274A PK_11 LLCE_CAN14_TXD U43 S32G274A PK_12 LLCE_CAN14_RXD TJA1463...
  • Page 34 U24 PCAL6524HEAZ P0_6 LLCE_CAN45_STB U43 S32G274A PJ_09 LLCE_CAN5_TXD U43 S32G274A PJ_10 LLCE_CAN5_RXD TJA1153 U24 PCAL6524HEAZ P0_7 LLCE_CAN45_EN U24 PCAL6524HEAZ P0_6 LLCE_CAN45_STB U43 S32G274A PJ_15 LLCE_CAN8_TXD U43 S32G274A PK_00 LLCE_CAN8_RXD TJA1463 U24 PCAL6524HEAZ P1_3 LLCE_CAN89_EN U24 PCAL6524HEAZ P1_2 LLCE_CAN89_STB U43 S32G274A PK_01 LLCE_CAN9_TXD U43 S32G274A...

  • Page 35: Lin And Uart

    TJA1043 U24 PCAL6524HEAZ P2_5 FLEX_CAN1_EN U24 PCAL6524HEAZ P2_4 FLEX_CAN1_STB 3.11 LIN and UART The table below describes the LIN and UART connections on the S32G-VNP-GLDBOX. Table 21. LIN and UART connections S32G274A IO Description PC_10 UART0 FT232RQ PC_09 PA_13 UART1...

  • Page 36: Flexray

    LLCE_LIN3 (Master mode) RXD4 PL_07 PB_11 U100 FLEX_LIN2 (Slave mode) TJA1021T PB_12 3.12 FlexRay The table below describes the FlexRay connections on the S32G-VNP-GLDBOX. Table 22. FlexRay connections FlexRay PHY Connection Signal U43 S32G274A PL_02 LLCE_FR_TXD_A TXEN U43 S32G274A PL_01...

  • Page 37: I2C

    The I2C module is a functional unit that provides a two-wire bidirectional serial bus. Its operating speed can be up to 100 kbps in the standard mode and up to 400 kbps in the fast mode. The table below describes the I2C connections on the S32G-VNP-GLDBOX. Table 24. I2C connections...

  • Page 38: Usb

    I2C2_SCL PB_05 Connector I2C2_SDA PB_06 Note: 1. S32G-VNP-GLDBOX REVC does not contain U136 and U137. 3.15 The USB PHY connects to external USB devices through J4 (MICRO_AB) and supports both Host mode (through the OTG cable) and Device mode (through the USB-A to Micro-B cable). When the USB PHY works in Host mode, it is recommended that the load current of the connected USB device MUST be less than 1A.

  • Page 39: Cables Description

    PL_09 CLKOUT PL_08 Cables Description The table below describes the Cable of Connector J6. Table 26. J6 Cable Signal Cable color connector connector Cable color Signal FlexRay_BP Blue White FlexRay_BM FlexCAN0_H Green White FlexCAN0_L FlexCAN1_H Green White FlexCAN1_L LLCE_CAN0_H Yellow White LLCE_CAN0_L LLCE_CAN1_H...

  • Page 40: Table 27. J5 Cable

    LLCE_CAN11_H Yellow White LLCE_CAN11_L LLCE_CAN12_H Yellow White LLCE_CAN12_L LLCE_CAN13_H Yellow White LLCE_CAN13_L LLCE_CAN14_H Yellow White LLCE_CAN14_L LLCE_CAN15_H Yellow White LLCE_CAN15_L Black Black The table below describes the Cable of Connector J5. Table 27. J5 Cable Signal Cable color connector connector Cable color Signal Orange...

  • Page 41: Table 28. J53 Cable

    Black Black Green Black ADC_IN0 Green Green ADC_IN1 ADC_IN2 Green Green ADC_IN3 ADC_IN4 The table below describes the Cable of Connector J53. Table 28. J53 Cable Connector Signal Cable color White 100Base-T1 TRX6 Yellow White 100Base-T1 TRX9 Yellow White 100Base-T1 TRX5 Yellow...
  • Page 42 White 100Base-T1 TRX7 Yellow White 100Base-T1 TRX8 Yellow White 100Base-T1 TRX10 Yellow...

  • Page 43: Revision History

    REVD. Updated the overview diagram, power tree, reset tree, and clock tree for S32G-VNP-GLDBOX REVD. 1 Mar 2021 Added U136, U137 to the I2C chapter for S32G-VNP-GLDBOX REVD. Ethernet PHY chapter changed AQR107 to AQR113C for S32G- VNP-GLDBOX REVD. Added PF5300 I2C address.

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