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NXP Semiconductors
Buffer Manager will first check if the RX buffer with Buffer ID=1 is available. If it is not
available, it will check RX buffer with Buffer ID=2 and failing that the search will wrap
around and check RX buffer with Buffer ID=0.
If there are no suitable RX buffers available, the buffer manager sets
RX_BUFFER_NOT_AVAILABLE_STATUS in register HOSTIF_INT_STATUS_REG and
asserts the corresponding outputs logic high. The output will remain high until the
firmware sets RX_BUFFER_NOT_AVAILABLE_CLR_STATUS bit in register
HOSTIF_INT_CLR_STATUS_REG.
NOTES:
1. The buffer manager can only set
2. Setting HOSTIF_SET_DATA_READY_REG.SET_RX<n>_DATA_READY bit by the
3. Setting HOSTIF_CLR_DATA_READY_REG.CLR_RX_DATA_READY bit by the
Transmitting frames
Once the firmware has loaded the TX buffer with a frame, it should set bit
HOSTIF_SET_DATA_READY_REG.SET_TX_DATA_READY logic high to indicate to
the buffer manager that the frame is ready for sending. This causes bit
HOSTIF_DATA_READY_STATUS_REG.TX_DATA_READY to go logic high. When the
buffer manager receives the first read request, it checks that the following conditions are
satisfied:
• HOSTIF_DATA_READY_STATUS_REG.TX_DATA_READY = 1
• HOSTIF_STATUS_REG.TX_BUFFER_PREFETCH_OK = 1
If both are true, the buffer manager locks the TX buffer for its own use by setting bit
HOSTIF_STATUS_REG.TX_BUFFER_LOCK and starts to send bytes. If it is not set, it
will set TX_FRAME_NOT_AVAILABLE_STATUS flag in HOSTIF_INT_STATUS_REG
register. Once the entire frame has been sent, the buffer manager performs the following
actions:
• generates an EOT event
• clears bit HOSTIF_DATA_READY_STATUS_REG.TX_DATA_READY logic low
• clears bit HOSTIF_STATUS_REG.TX_BUFFER_LOCK logic low
• clears bit HOSTIF_STATUS_REG.TX_BUFFER_PREFETCH_OK logic low
UM10858
User manual
COMPANY PUBLIC
HOSTIF_DATA_READY_STATUS_REG.RX<n>_DATA_READY bit.
firmware will only cause
HOSTIF_DATA_READY_STATUS_REG.RX<n>_DATA_READY bit to be set if the
Buffer Manager is not using the RX<n> buffer
(HOSTIF_STATUS_REG.RX<n>_BUFFER_LOCK bit is 0). This bit is only intended
for debugging purposes.
firmware will only cause
HOSTIF_DATA_READY_STATUS_REG.RX<n>_DATA_READY bit to be cleared if
the buffer manager is not using the RX<n> buffer
(HOSTIF_STATUS_REG.RX<n>_BUFFER_LOCK bit is 0).
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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