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14.2.9.3 SPIM_CONTROL_REG
This register is used to control the SPI transmission or reception.
Table 297. SPIM_CONTROL_REG (address offset 0x0008)
Bit
31:4
3
2
1
0
14.2.9.4 SPIM_RX_BUFFER_REG
This register is used to configure the RX buffer.
Table 298. SPIM_RX_BUFFER_REG (address offset 0x000C)
Bit
31:23
22:14
13:0
14.2.9.5 SPIM_RX_BUFFER_CRC_REG
This register is used to configure the RX CRC.
Table 299. SPIM_RX_BUFFER_CRC_REG (address offset 0x0010)
Bit
31:17
16:8
UM10858
User manual
COMPANY PUBLIC
Symbol
RESERVED
TX_SET_CRC
TX_START
RX_SET_CRC
RX_START
Symbol
RESERVED
RX_LENGTH
RX_START_ADDR
Symbol
RESERVED
RX_CRC_PAYLOAD_OFFSET
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Access Reset
Description
Value
W
0
Reserved
W
0
Flag to init internal CRC to
TX_CRC_INIT. Automatically returns
to 0.
W
0
1: Start TX. Automatically returns to 0
W
0
Flag to init internal CRC to
RX_CRC_INIT. Automatically returns
to 0
W
0
1: Start RX. Automatically returns to 0
Access Reset
Description
Value
R
0
Reserved
R/W
0
Size of RX transfer.
RX_LENGTH = 0: RX transfer of size
0 is not allowed
RX_LENGTH = 1: RX transfer
payload of size 1 byte
RX_LENGTH = 2: RX transfer
payload of size 2 byte
RX_LENGTH = 511: RX transfer
payload of size 511 byte
R/W
0
Byte start address of RX buffer:
start_addr+RX_length must not
exceed maximum address range
Reset
Access
Description
Value
R
0
Reserved
R/W
0x01
Number of bytes to skip for CRC
computation
UM10858
© NXP B.V. 2018. All rights reserved.
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