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14.3.3.10 HS UART reception from host to host interface
The UART reception should be programmed in the following order:
• Program HSU_RX_DIVIDER and HSU_RX_CLK_CORRECT for the expected
• Program host interface RX_DATA_READY to free a buffer for reception, which will
• Wait for End of Reception Interrupt.
At the end of data reception, CPU can read back memory to analyze received data like
for other interface.
14.3.3.11 HS UART interrupt
The HS UART can provide an interrupt HSU_RX_FER, (which is not the case for all
other interfaces). When this interrupt is set, this means that stop bit was not correctly
sampled for one byte. The HSU_RX_FER interrupt does not stop receiving the frame.
14.3.3.12 HS UART transmission from host interface to host
The TX transmission should be performed in the following order:
•
•
•
•
The HS UART transmit state machine is a slave to buffer manager state machine: it waits
for data from the buffer manager, then sends them to HSU_TX, so the protocol between
HS UART and the buffer manager is a bit different from the one used for SPI or I2C. The
buffer manager sends a signal that a new data is available. The HS UART acknowledges
the received data (at the end of transmission). This can be seen on picture
end of transmission, the HS UART with generate the EOF signal, by sending as many '1'
on TX line as specified by EOF_SIZE. The end of transmission will only be sent to
firmware after this EOF transmission, thus allowing firmware to directly send a new frame
without any wait time.
UM10858
User manual
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reception baud rates. Or program HSU_USE_BR_ESTIMATOR to 1
have the effect of driving RTS low, and allow the host to send data
Program HSU_RX_DIVIDER and HSU_TX_CLK_CORRECT for the transmission
baud rate (if HSU_USE_BR_ESTIMATOR is not already set by previous Reception)
Program the TX frame in memory
Program TX_BUFFER_READY to start the buffer manager state machine
Wait for End Of Transmission Interrupt
Fig 65. HS UART-Buf_mgt protocol for transmit sequence
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
Fig
65. At the
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