NXP Semiconductors PN7462 series User Manual page 303

NXP Semiconductors
Bit
2
1
0
[1]
[2]
HOSTIF_DATA_READY_STATUS_REG
This register is used to indicate the status of data ready flags for buffers.
Table 345. HOSTIF_DATA_READY_STATUS_REG (address offset 0x0070)
Bit
31:5
4
3
2
1
0
UM10858
User manual
COMPANY PUBLIC
Symbol
CLR_RX2_DATA_REA
[2]
DY
CLR_RX1_DATA_REA
[2]
DY
CLR_RX0_DATA_REA
[2]
DY
Setting this bit will only cause bit HOSTIF_DATA_READY_STATUS_REG.TX_DATA_READY to be
cleared if the buffer is not in use by the Buffer Manager (HOSTIF_STATUS_REG.TX_BUFFER_LOCK =
0).
Setting this bit will only cause bit HOSTIF_DATA_READY_STATUS_REG.RX<n>_DATA_READY to be
cleared if the buffer is not in use by the Buffer Manager (HOSTIF_STATUS_REG.RX<n>_BUFFER_LOCK
= 0).
Symbol
RESERVED
TX_DATA_READY
[1]
[2]
RX3_DATA_READY
[1][3]
RX2_DATA_READY
[1][3]
RX1_DATA_READY
[1][3]
RX0_DATA_READY
[1][3]
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Access Reset Description
value
W 0 Clear RX2_DATA_READY
W 0 Clear RX1_DATA_READY
Clear RX0_DATA_READY
W 0
Access Reset Description
Value
R 0 Reserved
R 0 Frame valid bit for TX buffer.
1 - buffer loaded with frame by FW to be
sent to Host
0 - frame successfully sent to Host.
R 0
Frame valid bit for RX buffer 3.
1 - buffer contains an error-free frame
received from Host
0 - frame has been processed by FW and
buffer is free to receive a new frame.
R 0 Frame valid bit for RX buffer 2.
1 - buffer contains an error-free frame
received from Host
0 - frame has been processed by FW and
buffer is free to receive a new frame.
R 0 Frame valid bit for RX buffer 1.
1 - buffer contains an error-free frame
received from Host
0 - frame has been processed by FW and
buffer is free to receive a new frame.
R 0 Frame valid bit for RX buffer 0.
1 - buffer contains an error-free frame
received from Host
0 - frame has been processed by FW and
buffer is free to receive a new frame.
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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