Clock Box - NXP Semiconductors PN7462 series User Manual

NXP Semiconductors

8.4 Clock box

The Clock Box is responsible for generating all clock signals for the system.
The PCR_CLK_CFG_REG and PCR_CLK_CFG2_REG are used by firmware to gate
system and IP clocks going to different modules.
Fig 22. Clock Box control
The system clock source can be one among:
HFO 20 MHz
XTAL  27.12 MHz (internal test purpose)
CLK_USB/2  24 Mhz. (only internal test purpose)
System clock must be always 20 MHz
UM10858
User manual
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Rev. 1.4 — 14 May 2018
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UM10858
PN7462 family HW user manual
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