NXP Semiconductors PN7462 series User Manual page 50

NXP Semiconductors
6.7.1.5 PMU_INTERRUPT_CLR_ENABLE_REG
This register is a collection of Clear Interrupt Enable commands with automatic clear if
set by software.
Table 42. PMU_INTERRUPT_CLR_ENABLE_REG (address offset 0x3FD8)
Bit Symbol
31:9 RESERVED
8 VBUSMON2_LOW_IRQ_CLEAR_
ENABLE
7 TXLDO_5V_MON_IRQ_CLEAR_
ENABLE
6 VCC_ILIM_ACT_IRQ_CLEAR_E
NABLE
5 RESERVED
4 PVDD_IRQ_CLEAR_ENABLE
3 DCDC_OVERLOAD_IRQ_CLEAR
_ENABLE
2 SCVDD_OVERLOAD_IRQ_CLEA
R_ENABLE
1 TXLDO_OVERCURRENT_IRQ_C
LEAR_ENABLE
0 TEMPSENS_ERROR_IRQ_CLEA
R_ENABLE
6.7.1.6 PMU_INTERRUPT_SET_ENABLE_REG
This register is a collection of Set Interrupt Enable commands with automatic clear if set
by software.
Table 43. PMU_INTERRUPT_SET_ENABLE_REG (address offset 0x3FDC)
Bit Symbol
31:9 RESERVED
VBUSMON2_LOW_IRQ_SET_EN
8 ABLE
7 TXLDO_5V_MON_IRQ_SET_EN
ABLE
6 VCC_ILIM_ACT_IRQ_SET_ENAB
LE
UM10858
User manual
COMPANY PUBLIC
Access Value
-X 0x00
-X 0x00
-X 0x00
-X 0x00
-X 0x00
-X 0x00
-X 0x00
-X 0x00
-X 0x00
-X 0x00
Access Value
-X 0x00
-X 0x00
-X 0x00
-X 0x00
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Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Description
Reserved
clears enable state of Vbus monitor 2
going low interrupt
clears enable state of TXLDO 5 V monitor
interrupt
clears enable state of VCC current limiter.
Automatically cleared after 2 cycles if set
by software
Reserved
clears enable state of PVDD interrupt.
Automatically cleared after 2 cycles if set
by software
clears enable state of DC-to-DC converter
overload. Automatically cleared after 2
cycles if set by software
clears enable state of SCVDD overload.
Automatically cleared after 2 cycles if set
by software
clears enable state of TXLDO overcurrent
interrupt. Automatically cleared after 2
cycles if set by software
clears enable state of Temperature sensor
calibration interrupt. Automatically cleared
after 2 cycles if set by software
Description
Reserved
enables Vbus monitor 2 going low
interrupt
Enables TXLDO 5 V monitor interrupt
Enables VCC current limiter.
Automatically cleared after 2 cycles if set
by software
UM10858
© NXP B.V. 2018. All rights reserved.
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