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compute HSU_RX_DIVIDER and HSU_TX_DIVDER, and the remainder of this division
is used to compute HSU_RX_CORRECT and HSU_TX_CORRECT. The computed
value is sent to registers for reading/checking by firmware.
If HSU_BR_ESTIMATOR_MODE is 1, then the computed values (RX/TX_CLK_DIVIDER
and RX/TX_CLK_CORRECT) are automatically used for any further data sampling or
data sending. If HSU_BR_ESTIMATOR_MODE is 2, then data sampling and data
sending is still performed using programmed values. In case the baud rate estimator is
active in automatic mode, and TX happens BEFORE RX (should not be done anyway),
then the parameters used for clock divider/clock correction are the one programmed in
HSU_CONTROL_REG/HSU_SAMPLE_REG. Once a reception occurs, the TX
parameters will be taken from HSU_EST_xx registers.
Note that the first calibration byte can be stored in memory by setting
HSU_STORE_BR_BYTE to 1. This must not be used for HDLL (since no extra byte is
expected before header for payload length analysis).
If the baud rate estimator overflows (duration of first received 0x00 byte is too long), then
RX_FER interrupt will be raised, and the value of HSU_EST_RX_DIVIDER_REG is set
to 1023.
14.3.3.8 RTS/CTS flow control
The CTS input is used to indicate that the host can (CTS=0) or cannot (CTS=1) receive
the data. Before sending a byte, the host interface will sample the value of CTS. If the
value is 0, then the whole byte to send will be sent over TX line. If not, then the host
interface will wait for CTS to be 0 before sending the byte.
The RTS is used to signal to the host that at least one buffer is ready to receive data
(RTS=0). This is shown in
firmware), the RTS changes from 1 to 0, allowing the host to send a frame. At the end of
the frame reception, the buffer becomes unavailable and the RTS changes to 1 if no
other buffer is available, until firmware programs a new buffer. Note that after reset, all
buffers are enabled, so by default RTS is '0' and the host can send data. The firmware
should ensure that the buffers are correctly configured, or disabled, before enabling the
RTS pad.
Note that in case the host sends a frame longer than buffer size, a buffer_overflow
interrupt will be sent to the firmware. The RTS will not toggle to high. Data received after
the error are not stored into memory. The error is signaled to the firmware by an
interrupt.
UM10858
User manual
COMPANY PUBLIC
Fig
Fig 64. RTS generation, frame based
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
64. Once one RX buffer is available (programmed by
314514
UM10858
PN7462 family HW user manual
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