NXP Semiconductors PN7462 series User Manual page 94

NXP Semiconductors
Table 87. PCR_PADOUT_REG (address offset 0x3C)
Bit Symbol
31:29 RESERVED
28 RESERVED
27 RESERVED
26 PADOUT_CLK_AUX
25 PADOUT_IO_AUX
24 PADOUT_INT_AUX
23 PADOUT_GPIO12
22 PADOUT_GPIO11
21 PADOUT_GPIO10
20 PADOUT_GPIO9
19 PADOUT_GPIO8
18 PADOUT_GPIO7
17 PADOUT_GPIO6
16 PADOUT_GPIO5
15 PADOUT_GPIO4
14 PADOUT_GPIO3
13 PADOUT_GPIO2
12 PADOUT_GPIO1
11 PADOUT_DWL_REQ
10 PADOUT_MISO_M
9 PADOUT_MOSI_M
8 PADOUT_SCLK_M
7 PADOUT_NSS_M
6 PADOUT_SDA_M
5 PADOUT_SCL_M
4 PADOUT_IRQ
3 PADOUT_ATX_D
2 PADOUT_ATX_C
1 PADOUT_ATX_B
0 PADOUT_ATX_A
Table 88. PCR_PAD_ATX_A_REG (address offset 0x40)
Bit Symbol
31:5 RESERVED
4
ATX_A_SLEW_RATE
3:2 ATX_A_PUPD
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Access Value Description
- 0x00 Reserved
rw 0x00 Reserved
rw 0x00 Reserved
rw 0x00 output value for CLK_AUX
rw 0x00 output value for IO_AUX
rw 0x00 output value for INT_AUX
rw 0x00 output value for GPIO12
rw 0x00 output value for GPIO11
rw 0x00 output value for GPIO10
rw 0x00 output value for GPIO9
rw 0x00 output value for GPIO8
rw 0x00 output value for GPIO7
rw 0x00 output value for GPIO6
rw 0x00 output value for GPIO5
rw 0x00 output value for GPIO4
rw 0x00 output value for GPIO3
rw 0x00 output value for GPIO2
rw 0x00 output value for GPIO1
rw 0x00 output value for DWL_REQ
rw 0x00 output value for MISO_M
rw 0x00 output value for MOSI_M
rw 0x00 output value for SCLK_M
rw 0x00 output value for NSS_M
rw 0x00 output Value SDA_M
rw 0x00 output Value SCL_M
rw 0x00 output value for IRQ
rw 0x00 output Value ATX_D
rw 0x00 output Value ATX_C
rw 0x00 output Value ATX_B
rw 0x00 output Value ATX_A
Access Value Description
rw 0x00 Reserved
Select driver strength for ATX_A
rw 0x00 1: Enable slew for ATX_A
rw 0x00 Enable PullUp/Down on ATX_A
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Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
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