NXP Semiconductors PN7462 series User Manual page 342

page of 345

/ 345
Contents
Table of Contents
Bookmarks

Table of Contents

NXP Semiconductors

Table 297. SPIM_CONTROL_REG (address offset 0x0008)

...................................................................... 259

Table 298. SPIM_RX_BUFFER_REG (address offset

0x000C) ........................................................ 259

Table 299. SPIM_RX_BUFFER_CRC_REG (address offset

0x0010) ......................................................... 259

Table 300. SPIM_TX_BUFFER_REG (address offset

0x0014) ......................................................... 260

Table 301. SPIM_TX_BUFFER_CRC_REG (address offset

0x0018) ......................................................... 260

Table 302. SPIM_CRC_STATUS_REG (address offset

0x001C) ........................................................ 261

Table 303. SPIM_WATERLEVEL_REG (address offset

0x0020) ......................................................... 261

Table 304. SPIM_BUFFER_MAPPING_REG (address

offset 0x002C) ............................................... 261

Table 305. SPIM_INT_CLR_ENABLE_REG (address offset

0x3FD8) ........................................................ 262

Table 306. SPIM_INT_SET_ENABLE_REG (address offset

0x3FDC)........................................................ 262

Table 307. SPIM_INT_STATUS_REG (address offset

0x3FE0) ........................................................ 263

Table 308. SPIM_INT_ENABLE_REG (address offset

0x3FE4) ........................................................ 263

Table 309. SPIM_INT_CLR_STATUS_REG (address offset

0x3FE8) ........................................................ 263

Table 310. SPIM_INT_SET_STATUS_REG (address offset

0x3FEC) ........................................................ 264

Table 311. Interface selection ......................................... 266

Table 312. I²C pinning and signal assignments .............. 266

Table 313. I2C Mode Maximum Bitrates ......................... 267

Table 314. SPI pinning.................................................... 270

Table 315. HS UART pinning and signal assignments ... 273

Table 316. HSU baud rates for 27.12 MHz+/-1.5 % sample

clock .............................................................. 275

Table 317. EOF duration in us ........................................ 276

Table 318. Bit duration in sample clock cycle ................. 278

Table 319. Buffer ID assignment .................................... 281

Table 320. ed format per interface .................................. 281

Table 321. Summary of possible NCI modes .................. 284

Table 322. Register overview (base address 0x4002 0000)

...................................................................... 290

Table 323. HOSTIF_STATUS_REG (address offset

0x0000) ......................................................... 292

Table 324. HOSTIF_CONTROL_REG (address offset

0x0004) ......................................................... 293

Table 325. HOSTIF_HEADER_CONTROL_REG (address

offset 0x0008) ............................................... 293

Table 326. HOSTIF_I2C_CONTROL_REG (address offset

0x000C) ........................................................ 294

UM10858

User manual

COMPANY PUBLIC

Table 327. HOSTIF_SPI_CONTROL_REG (address offset

Table 328. HOSTIF_HSU_CONTROL_REG (address offset

Table 329. HOSTIF_HSU_SAMPLE_REG (address offset

Table 330. HOSTIF_HSU_EST_CLOCK_DIVIDER_REG

Table 331. HOSTIF_HSU_EST_CLOCK_CORRECT_REG

Table 332. HOSTIF_BUFFER_RX0_CFG_REG (address

Table 333. HOSTIF_BUFFER_RX1_CFG_REG (address

Table 334. HOSTIF_BUFFER_RX2_CFG_REG (address

Table 335. HOSTIF_BUFFER_RX3_CFG_REG (address

Table 336. HOSTIF_BUFFER_TX_CFG_REG (address

HOSTIF_BUFFER_RX0_LEN_REG (address offset

Table 337. HOSTIF_BUFFER_RX1_LEN_REG (address

Table 338. HOSTIF_BUFFER_RX2_LEN_REG (address

Table 339. HOSTIF_BUFFER_RX3_LEN_REG (address

Table 340. HOSTIF_BUFFER_TX_LEN_REG (address

Table 341. HOSTIF_TIC_TIMEOUT_REG (address offset

Table 342. HOSTIF_WATERLEVEL_REG (address offset

Table 343. HOSTIF_SET_DATA_READY_REG (address

Table 344. HOSTIF_CLR_DATA_READY_REG (address

Table 345. HOSTIF_DATA_READY_STATUS_REG

Table 346. HOSTIF_DBG_RX_REG (address offset

Table 347. HOSTIF_DBG_RX_ADDR_REG (address offset

Table 348. HOSTIF_INT_CLR_ENABLE_REG (address

Table 349. HOSTIF_INT_SET_ENABLE_REG (address

Table 350. HOSTIF_INT_STATUS_REG (address offset

All information provided in this document is subject to legal disclaimers.

Rev. 1.4 — 14 May 2018

314514

UM10858

PN7462 family HW user manual

0x0010) ......................................................... 294

0x0014) ......................................................... 294

0x0018) ......................................................... 295

(address offset 0x001C) ................................ 295

(address offset 0x0020)................................. 296

offset 0x0038) ............................................... 296

offset 0x003C) ............................................... 297

offset 0x0040) ............................................... 297

offset 0x0044) ............................................... 298

offset 0x0048) ............................................... 299

0x004C)......................................................... 299

offset 0x0050) ............................................... 300

offset 0x0054) ............................................... 300

offset 0x0058) ............................................... 300

offset 0x005C) ............................................... 301

0x0060) ......................................................... 301

0x0064) ......................................................... 302

offset 0x0068) ............................................... 302

offset 0x006C) ............................................... 302

(address offset 0x0070)................................. 303

0x0074) ......................................................... 304

0x0078) ......................................................... 304

offset 0x3FD8) ............................................... 304

offset 0x3FDC) .............................................. 306

0x3FE0) ......................................................... 308

342 of 345

Table of Contents

This manual is also suitable for:

Pn7362auhn Pn7362auev Pn7360auhn Pn7360auev Pn7462auhn Pn7462auev

NXP Semiconductors PN7462 series User Manual page 342

Related Manuals for NXP Semiconductors PN7462 series

Related Products for NXP Semiconductors PN7462 series

This manual is also suitable for:

Table of Contents