NXP Semiconductors PN7462 series User Manual page 165

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NXP Semiconductors
Bit
Symbol
3
TX_S23_SC_FREQ
2:0
TX_S23_BIT_FREQ
Table 203. CLIF_TX_OVERSHOOT_CONFIG_REG register (address 0054h)
* = reset value
Bit
Symbol
31:16
TX_OVERSHOOT_P
ATTERN
15:5
RESERVED
4:1
TX_OVERSHOOT_P
ATTERN_LEN
0
TX_OVERSHOOT_P
ROT_ENABLE
Table 204. CLIF_TX_UNDERSHOOT_CONFIG_REG register (address 0058h)
* = reset value
Bit
Symbol
31:16
TX_UNDERSHOOT_
PATTERN
15:6
RESERVED
UM10858
User manual
COMPANY PUBLIC
Access
Value
000
001
010
011
100
101
110
111
R/W
0*, 1
0
1
R/W
000* - 111
000*
001
010
011
100
101
110
111
Access
Value
R/W
0* - FFFFh
R
0
R/"
0* - Fh
R/W
0*, 1
Access
Value
R/W
0* - FFFFh
R
0
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Description
Direct output
Manchester code
Manchester code with subcarrier
BPSK
RZ (pulse of half bit length at beginning of second half of bit)
RZ (pulse of half bit length at beginning of bit)
Manchester tuple
Reserved
Specifies the frequency of the subcarrier.
424 kHz
848 kHz
Specifies the frequency of the bit-stream.
1.695 MHz
3.39 MHz
26 kHz
53 kHz
106 kHz
212 kHz
424 kHz
848 kHz
Description
Overshoot pattern which is transmitted after each rising
edge.
Reserved
Defines length of the overshoot prevention pattern (value
+1). The pattern is applied starting from the MSB of the
defined pattern, all other bits are ignored.
If set to 1, the overshoot protection is enabled.
Description
Undershoot pattern which is transmitted after each rising
edge.
Reserved
UM10858
© NXP B.V. 2018. All rights reserved.
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