Functional Description - NXP Semiconductors PN7462 series User Manual

NXP Semiconductors

12.4 Functional Description

Fig 33
12.4.1 Clock/Reset Block
The Clock/Reset module is the source of all clocks and reset used in the CLIF.
Table 184
Table 184. Input clocks of CLIF
Symbol
clk_pll_27m12
clk_rf_27m12
clk_pcr_lfo
clk_pcr_hfo
The main clock for the contactless interface is the clk13 - a 13.5 6MHz clock derived from
27.12 MHz clock either from PLL or the analog RF clock recovery. The RF clock is only
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shows an overview of the Contactless interface.
Fig 33. Contactless interface
summarized the input clocks of the CLIF module.
Source
PCR
Clock
Recovery
PCR
PCR
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Frequency Description
IP clock for active contactless
27.12 MHz
communication.
Clock recovered from the RF-Field by
27.12 MHz
the analog CLIF clock recovery
380 KHz Low frequency oscillator clock
20 MHz High frequency oscillator clock
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