NXP Semiconductors PN7462 series User Manual page 89

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NXP Semiconductors
Bit
Symbol
11:0
GPIO_WAKEUP_ENABLE
Table 82. PCR_BOOT_REG (address offset 0x28)
Bit
Symbol
31
RESERVED
30
USB_VBUS_OK
29
POK_VBUS
28
POK_PVDD_M_3V
27
POK_PVDD_3V
26
RESERVED
25:22
STBY_PREV_REASON
21:2
BOOT_REASON
1
POK_PVDD_M
0
POK_PVDD
Table 83. PCR_CTLR_REG (address offset 0x2C)
Bit
Symbol
31:6
RESERVED
5
USB_VBUS_PULLDOWN
4
CLR_BOOT_REGS
UM10858
User manual
COMPANY PUBLIC
Access
Value
Description
Enables wake-up by the corresponding GPIO
0: gpio1
1: GPIO2
rw
0x0FF
e.t.c ....
Access
Value
Description
rw
0x00
Reserved
Indicator for USB_VBUS is ok
r-
0x00
1: USB_VBUS is available
Indicator when VBUS > VBUSCritical when
VBUSMonitor is enabled
1: VBUS > VBUSCritical
r-
0x00
0: VBUS < VBUSCritical
Indicator for more than 3 V at PVDD_M pin
1: PVDD_M is available and over 3.3 V
r-
0x00
0: PVDD_M is not over 3.3 V
Indicator for more than 3V at PVDD pin
1: PVDD is available and over 3.3 V
0: PVDD is not over 3.3 V
r-
0x00
Reserved
r-
0x00
Standby prevention reason
r-
0x00
Boot up reason
r-
0x00
Indicator if PVDD_m is available
1: PVDD_m is available and over 1.8 V
0: PVDD_m is not available
r-
0x00
Indicator if PVDD is available
1: PVDD is available and over 1.8 V
0: PVDD is not available
r-
0x00
Access
Value
Description
rw
0x00
Reserved
1: Enables the internal pulldown resistance to pulldown
rw
0x00
the USB_VBUS
Clearing Standby Prevention and Boot up register values
-x
0x00
in the PCR_BOOT_REG register
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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