Table of Contents
Advertisement
NXP Semiconductors
All data bytes are transferred from memory to SPI or from SPI to memory. An exception
is CRC, which in case of TX can be automatically computed and appended to the sent
frame.
14.2.6 Buffer initialization
14.2.6.1 RX buffers
Before reading data from the SPI slave, firmware should configure the receive buffer.
This is done by using SPIM_BUFFER_MAPPING_REG, SPIM_RX_BUFFER_REG and
SPIM_RX_BUFFER_CRC_REG registers. The SPIM_RX_BUFFER_REG specifies the
buffer start address (inside System RAM address space), and length of the read access.
The RX_LENGTH of 0 is not a valid buffer length. Special attention should be paid to the
fact that the RX buffer should not exceed the maximum address size. RX_START_ADDR
+ RX_LENGTH must be kept in System RAM address range. The address is a byte
address, which means that the data will be stored byte-aligned in the memory. Note that
in case the address is not multiple of 4, all bytes of first word may be overwritten during
data reception: content of first bytes (from word_start_addr to start_addr-1) is undefined.
The same applies for the last byte written to memory: all bytes of the last word will be
overwritten with undefined values. This is shown in
Second register defines the reset value of the CRC (Should be programmed to 0xff), and
the number of bytes to skip from the CRC computation from the received packets: default
value is 0. When FW wants to reset CRC, then RX_SET_CRC bit of
SPIM_CONTROL_REG will have to be written. This can be done during same write
access as writing RX_START.
UM10858
User manual
COMPANY PUBLIC
Fig 52. SPI packed structure
Fig 53. RX data storage into memory. Defined/ undefined data
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Fig
314514
UM10858
PN7462 family HW user manual
53.
© NXP B.V. 2018. All rights reserved.
254 of 345
Advertisement
Table of Contents
