NXP Semiconductors PN7462 series User Manual page 184

NXP Semiconductors
Bit Symbol
11:10 CM_MILLER_TAU
[1]
9 INTERNAL_USE
[1]
8 INTERNAL_USE
[1]
7 INTERNAL_USE
[1]
6 INTERNAL_USE
[1]
5 INTERNAL_USE
[1]
4 INTERNAL_USE
[1]
3 INTERNAL_USE
[1]
2 INTERNAL_USE
[1]
1:0 INTERNAL_USE
[1] Bit-field are either set by HAL or use default value from CLIF EEPROM default settings
Table 232. CLIF_ANA_AGC_REG register (address 011Ch)
* = reset value
Bit Symbol
31:4 RESERVED
3 RESERVED
2 AGC_PD
1:0 AGC_VREF_SEL
Table 233. CLIF_ANA_CLK_MAN_REG register (address 0120h)
* = reset value
Bit Symbol
31:7 RESERVED
[1]
6 INTERNAL_USE
[1]
5 INTERNAL_USE
[1]
4 INTERNAL_USE
[1]
3 INTERNAL_USE
2:0 CLOCK_CONFIG_DLL_ALM
UM10858
User manual
COMPANY PUBLIC
Access Value
1
2
3
R/W 0h – 3h
0*
1
2
3
R/W 0*-1
R/W 0*-1
R/W 0-1*
R/W 0*-1
R/W 0*-1
R/W 0*-1
R/W 0*-1
R/W 0*-1
R/W 0h*-3h
Access Value
R 0*
R/W 0*, 1
R/W 0*-1
R/W 0h*-3h
0*
1*
2*
3*
Access Value
R 0*
R/W 0*, 1
R/W 0*-1
R/W 0*-1
R/W 0*-1
R/W 0h*-7h
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Description
50 %
65 %
80 %
Configuration bits for the time constant of the reference
generation in Miller demodulator
8 µs (cap of 125 f)
2 µs (cap of 500 f)
5 µs (cap of 200 f)
Not allowed
For internal use
For internal use
For internal use
For internal use
For internal use
For internal use
For internal use
For internal use
For internal use
Description
Reserved
Reserved always set to 0
AGC power down
Select the comparison reference voltage
V = 1.15 V which results in V
ref
V f = 1.4 V which results in V
ref
V = 1.5 V which results in V
ref
V = 1.6 V which results in V
ref
Description
Reserved
For internal use
For internal use
For internal use
For internal use
Select DLL clock phase in 45°C steps.
UM10858
= 0.5 V
Rx pp
= 1 V
Rx pp
= 1.2 V
Rx pp
= 1.4 V
Rx pp
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