Pn7462 Family Pmu Digital Control Unit - NXP Semiconductors PN7462 series User Manual

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6.2.1.7 Start-up times of LDOs
Table 34. Start-up times of LDOs
LDO
PVDDLDO
TXLDO
VCC LDO

6.3 PN7462 family PMU digital control unit

The PMU digital control unit of the PN7462 family is used in the system as the gateway
to configure all modes of supply for the product using the control registers. Note that
additional registers related to PMU control are located in the power clock and reset
(PCR) Unit for they need to be always powered up. The PMU digital control unit consists
of the AMBA 3.0 APB interface and the associated register bank to drive the analog part
of PMU, plus additional glue logic related to controlling the temperature, overcurrent, pad
voltage, interrupts and calibration of temperature sensors.
Main blocks (see
• Register bank for PMU analog block (detailed description in
• Temperature sensor controller
• 32-bit APB slave interface
Fig 17. Block diagram of PMU
UM10858
User manual
COMPANY PUBLIC
Max Startup Time
1.5 ms
200 µs
22 ms (including DC-to-DC converter, SCLDO and VCCLDO startup times)
500 µs (excluding DC-to-DC and SCLDO)
Fig
17) are:
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
Section
6.7)
© NXP B.V. 2018. All rights reserved.
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