NXP Semiconductors PN7462 series User Manual page 247

NXP Semiconductors
Bit Symbol
9 ENABLE_FIFO_EMPTY
8 ENABLE_FIFO_FULL
7:4 RESERVED
3 ENABLE_I2C_BUS_ERR
OR
2 ENABLE_NACK
1 ENABLE_ARB_FAILURE
0 ENABLE_TRN_COMPLET
ED
14.1.9.16 INT_CLR_STATUS_REG
This register is a collection of Clear Interrupt Status commands. Writing 1 to this register
does set the corresponding Interrupt Request ENABLE flag. Writing 0 to this register has
no effect.
Table 291. INT_CLR_STATUS_REG (address offset 0x3FE8)
Legend: * reset value; <= mandatory value
Bit Symbol
31:12
RESERVED
CLR_STATUS_TX_FIFO_
11
THRES
10 CLR_STATUS_RX_FIFO_
THRES
CLR_STATUS_FIFO_EM
9
PTY
8 CLR_STATUS_FIFO_FUL
L
7:4 RESERVED
CLR_STATUS_I2C_BUS_
3
ERROR
CLR_STATUS_NACK
2
1 CLR_STATUS_ARB_FAIL
URE
0 CLR_STATUS_TRN_COM
PLETED
UM10858
User manual
COMPANY PUBLIC
Access Value Description
R 0x0* If this bit is 1 the corresponding IRQ can propagate to the
CPUs IRQ controller
R 0x0* If this bit is 1 the corresponding IRQ can propagate to the
CPUs IRQ controller
R 0x0* reserved
R 0x0* If this bit is 1 the corresponding IRQ can propagate to the
CPUs IRQ controller
R 0x0* If this bit is 1 the corresponding IRQ can propagate to the
CPUs IRQ controller
R 0x0* If this bit is 1 the corresponding IRQ can propagate to the
CPUs IRQ controller
R 0x0* If this bit is 1 the corresponding IRQ can propagate to the
CPUs IRQ controller
Access Value Description
R 0x0* reserved
W 0x0* Writing 1 to this register does clear the corresponding IRQ
STATUS flag
W 0x0*
Writing 1 to this register does clear the corresponding IRQ
STATUS flag
W 0x0*
Writing 1 to this register does clear the corresponding IRQ
STATUS flag
W 0x0*
Writing 1 to this register does clear the corresponding IRQ
STATUS flag
R 0x0*
reserved
W 0x0*
Writing 1 to this register does clear the corresponding IRQ
STATUS flag
W 0x0*
Writing 1 to this register does clear the corresponding IRQ
STATUS flag
W 0x0*
Writing 1 to this register does clear the corresponding IRQ
STATUS flag
Writing 1 to this register does clear the corresponding IRQ
W 0x0*
STATUS flag
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Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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