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NXP Semiconductors
8.6 I/O Pad Management
I/O Pad Management allows:
• Connecting the GPIO/I2C/SPI to a peripheral IO for device pins that are not
• Dynamic configuration as inputs or outputs or analog by FW
• Pull up, pull down or tri-state configuration
The GPIO read/write are made by the firmware using separate registers that allow
reading, setting or clearing outputs. The value of the output register may be read back as
well as the current state of the port pins. The pads controlled by the Pad Control Block
are summarized in
Table 70. All digital controlled pads
PAD Name
DWL_REQ
ATX_A, ATX_B, ATC_C, ATX_D
CLK_AUX, INT_AUX, IO_AUX
D+, D-
UM10858
User manual
COMPANY PUBLIC
Fig 23. Clock gating
connected to a specific peripheral function
Table 70.
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Power Supply
PVDD_IN
PVDD_IN
PVDD_IN_M
PVDD_IN
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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