NXP Semiconductors PN7462 series User Manual page 222

NXP Semiconductors
Bit Symbol Access
2:0 ACC2 - ACC0 R/W
13.6.2.9 Register ct_pcr_reg (Power Control Register)
This configuration register enables to start or stop card sessions, define the card supply
voltage (5V, 3V, 1.8V) and manage the card contacts C4 and C8 (also known as AUX1
and AUX2).
Table 257. ct_pcr_reg (address 0020h) bit description
Bit Symbol Access
31:8 RESERVED -
7 C8 R/W
6 C4 R/W
5 RESERVED -
4 RSTIN
3:2 vccsel1 - R/W
vccsel0
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Reset Description
Value
000b Asynchronous Card Clock
Defines the card clock frequency:
• 000: card clock frequency = fclk_ip
• 001: card clock frequency = fclk_ip /2
• 010: card clock frequency = fclk_ip /3
• 011: card clock frequency = fclk_ip /4
• 100: card clock frequency = fclk_ip /5
• 101: card clock frequency = fclk_ip /6
• 110: card clock frequency = fclk_ip /8
• 111: card clock frequency = fclk_ip /16
All frequency changes are synchronous, thus ensuring that no spikes or
unwanted pulse widths occur during changes.
In conjunction with registers ct_etucr_lsb_reg and ct_etucr_msb_reg, the bits
ACC2, ACC1 and ACC0 defines the baudrate used by the Contact UART.
Reset Description
Value
0 reserved
1b Contact 8
Writing C8 bit writes the corresponding value on C8 pin. Reading C8 bit reads
the state of C8 pin.
1b Contact 4
Writing C4 bit writes the corresponding value on C4 pin.
Reading C4 bit reads the state of C4 pin.
0 reserved
Reset bit
Synchronous card: when set to logic 1, RST pin is set to logic 1;
when set to logic 0, RST pin is set to logic 0.
Asynchronous card: RST is controlled by hardware (ATR management).
00b "VCC selection
Defines VCC voltage:
• 00: VCC = 5 V
• 01: VCC = 3 V
• 10 or 11: VCC = 1.8 V
Dynamic change (while activated) is not supported. The choice should be
done before activating the card.
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
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