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NXP Semiconductors
Table 331. HOSTIF_HSU_EST_CLOCK_CORRECT_REG (address offset 0x0020)
Bit
31:20
21:11
10:0
HOSTIF_BUFFER_RX0_CFG_REG
This register is used to configure the RX buffer 0
Table 332. HOSTIF_BUFFER_RX0_CFG_REG (address offset 0x0038)
Bit
31:29
28
27:26
25
24:14
13:0
UM10858
User manual
COMPANY PUBLIC
Symbol
RESERVED
HSU_EST_TX_CLK_C
ORRECT
HSU_EST_RX_CLK_C
ORRECT
Symbol
RESERVED
RX0_BUFFER_DISAB
LE [1]
RX0_HEADER_OFFS
ET [1][5][6]
RX0_SHORT_FRAME
_BUFFER [1][2][3][5]
RX0_MAX_SIZE
[1][2][4][5]
RX0_START_ADDR
[1][5]
[1]
Any change to this register, is only taken into account if the buffer is not in use
(RX0_BUFFER_LOCK = 0). However, the register itself is updated.
[3]
The frame length of a short frame is defined in field SHORT_FRAME_LEN of
HOSTIF_CONTROL_REG
[4]
Value must be greater than or equal to RX0_HEADER_OFFSET + + header + largest payload
expected (rounded up to the next word).
[5]
Attempting to change this field when the buffer is in use (RX0_BUFFER_LOCK = 1) will generate a
System Error.
[6]
Only values 0,1 or 2 are permitted
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Access
Reset
Description
Value
R
0
Reserved
Estimated value for
R
0
HSU_TX_CLK_CORRECT
R
0
Estimated value for
HSU_RX_CLK_CORRECT
Access
Reset
Description
Value
R
0
Reserved
R/W
0
1 - buffer is disabled
R/W
0x02
Number of padding bytes to add before
writing frame header to first word of RX
buffer 0. Not applicable to Native Mode.
R/W
0
1 - buffer assigned to short frames
0 - buffer assigned to non-short frames
Not applicable to Native Mode.
R/W
0
Maximum size (bytes) of RX buffer 0
R/W
0
Word start address of RX buffer 0. Bits
[1:0] are unused.
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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