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NXP Semiconductors
14. PN7462 family Interfaces
14.1 I2C Master Interface
The I2C bus is a simple two-wire bi-directional serial communication interface that is
intended for inter-IC communication over short distances. The I2C-bus uses only two
wires: a serial clock line (SCL) and a serial data line (SDA). Each device is recognized by
a unique address. The I2C master controller is one of two I2C controllers supported by
PN7462 family. The I2C slave controller is described in
14.1.1 I2C Master features:
UM10858
User manual
COMPANY PUBLIC
•
Standard I2C compliant bus interface with open-drain pins.
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Supports standard-mode, fast mode and fast mode plus (up to 1 MBds)
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Supports I2C master mode only
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Programmable clocks allowing versatile rate control
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Clock stretching
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7-bits and 10-bits I2C slave addressing
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LDM/STM instruction support
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Maximum data frame sizes up to 1024 bytes
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
Section 14.3.1.
© NXP B.V. 2018. All rights reserved.
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