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NXP Semiconductors
Fig 69. Endpoint command/status list
Table 354. Endpoint Commands
Symbol
Access
Description
A
R/W
Active
The buffer is enabled. hardware can use the buffer to store received OUT data or to transmit data
on the IN endpoint.
Firmware can only set this bit to „1‟. As long as this bit is set to one, firmware is not allowed to
update any of the values in this 32-bit word. In case firmware wants to deactivate the buffer, it
must write a one to the corresponding "skip" bit in the USB Endpoint skip register. Hardware can
only write this bit to zero. It will do this when it receives a short packet or when the NBytes field
transitions to zero or when firmware has written a one to the "skip" bit.
D
R/W
Disabled
„0‟: The selected endpoint is enabled.
„1‟: The selected endpoint is disabled.
When a bus reset is received, firmware must set the disable bit of all endpoints to „1‟.
Firmware can only modify this bit when the active bit is zero.
S
R/W
Stall
„0‟: The selected endpoint is not stalled
„1‟: The selected endpoint is stalled
The Active bit has always higher priority than the Stall bit. This means that a Stall handshake is
only sent when the active bit is zero.
Firmware can only modify this bit when the active bit is zero.
TR
R/W
Toggle reset
When firmware set this bit to one, the hardware will set the toggle value equal to the value
indicated in the "toggle value" (TV) bit.
For the control endpoint zero, this is not needed to be used because the hardware resets the
endpoint toggle to one for both directions when a setup token is received.
UM10858
User manual
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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