Table of Contents
Advertisement
NXP Semiconductors
4.4 SWD
Cortex-M0 processor-based devices use the Serial Wire ARM CoreSight™ debug
technology. The Serial Wire Debug (SWD) signals are connected to the pads via the
PCR (Power, Clock & Reset) described in
in order to have code (or data) read/write access protection.
4.4.1 SWD features
• Run Control of the processor allowing to start and stop programs
• Single Step one source or assembler line
• Set breakpoints while the processor is running
• Write memory contents and peripheral registers on-the-fly
• "Printf" like debug messages through the SWD.
4.4.2 SWD limitations
The PN7462 family does not allow breakpoint or single step debugging of ROM service
APIs and boot code. Breakpoint or single step debugging of ROM service APIs and Boot
code results into System reset.
Breakpoint and single step debugging is only allowed in the customer Application area.
4.4.3 Hardware connection of SWD
For using SWD it is recommended to connect an external pull-up from SWDCLK and
SWDIO to PVDD_IN supply (see
Table 31. SWD pinning
Pin Number
14
15
5. SysTick Timer (SysTick)
The SysTick timer is a 24-bit timer that counts down to zero and generates an interrupt.
The SysTick timer is clocked from the system clock or from the reference clock, which is
fixed to half the frequency of the system clock. In order to generate recurring interrupts at
a specific interval, the SYST_RVR register must be initialized with the correct value for
the desired interval. A default value is provided in the SYST_CALIB register and may be
changed by software.
Table 32. SysTick timer (base address 0xE000 E000)
Address
0xE000E010
0xE000E014
0xE000E018
UM10858
User manual
COMPANY PUBLIC
Table
31).
Pin Name
SWDCLK
SWDIO
Name
Type
SYST_CSR
RW
SYST_RVR
RW
SYST_CVR
RW
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
PN7462 family HW user manual
Section
0. The SWD interface can be disabled
Comment
SWD clock
SWD I/O
Reset
Description
0x000 0000
System Timer Control and status
register
0
System Timer Reload value register
0
System Timer Current value register
UM10858
© NXP B.V. 2018. All rights reserved.
31 of 345
Advertisement
Table of Contents
