NXP Semiconductors
Table 174. TIMERS_INT_SET_STATUS_REG (address offset 0x3FEC)
Bit
Symbol
31:4
RESERVED
3
TIMER3_TIMEOUT_SET_STATUS
2
TIMER2_TIMEOUT_SET_STATUS
1
TIMER1_TIMEOUT_SET_STATUS
0
TIMER0_TIMEOUT_SET_STATUS
12. PN7462 family Contactless interface
The PN7462 family embeds a high power 13.56 RF front end. The RF interface
implements the RF functionality, like antenna driving, and the receiver circuitry and all the
low-level functionalities, to enable the realization of an NFC forum or an EMV compliant
reader. The PN7462 family allows different voltages for the RF drivers. The PN7462
family uses an external oscillator, working at 27.12 MHz, as a clock source for generating
the RF field and its internal operation.
12.1 Contactless interface features
UM10858
User manual
COMPANY PUBLIC
Reset
Value
0
0
0
0
0
•
ISO/IEC 14443 type A & B compliant
•
MIFARE functionality, including MIFARE Classic encryption in read/write mode
•
ISO/IEC 15693 compliant
•
ICLASS UID
•
NC Forum - NFCIP-1 & NFC IP2 compliant
•
P2P, active and passive mode
•
Reading of NF C Forum Tag Types 1,2,3,4,5
•
FeliCa
•
ISO/IEC18000-3 Mode 3
•
EPC UID
•
EMVCo contactless
RF level can be achieved without the need of booster circuitry (for some
o
antenna topologies the EMV
RF-level compliance might physically not be achievable)
o
•
Card mode - enabling the emulation of an ISO14443 Type A card
Supports PLM (Passive Load Modulation) and ALM (Active Load
o
Modulation)
•
LPCD - Low Power Card Detection
•
Adjustable Rx-Voltage level
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
Access Type
Description
W
reserved
W
1: set Timer3 timeout interrupt
0: no effect
W
1: set Timer2 timeout interrupt
0: no effect
W
1: set Timer1 timeout interrupt
0: no effect
W
1: set Timer0 timeout interrupt
0: no effect
314514
UM10858
PN7462 family HW user manual
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