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4.4
Drive Strength and Reset States for Analog-Digital Multiplexed Pins
Table 4-4
describes the use, drive strength, and default state of analog- and digital-multiplexed pins at
first-time power up and reset (nRESET pulled low).
Table 4-4. Drive Strength and Reset States for Analog-Digital Multiplexed Pins
BOARD LEVEL
PIN
CONFIGURATION AND USE
42
Generic I/O
44
Generic I/O
Analog signal (1.8-V absolute,
47
1.46-V full scale)
Analog signal (1.8-V absolute,
48
1.46-V full scale)
Analog signal (1.8-V absolute,
49
1.46-V full scale)
Analog signal (1.8-V absolute,
50
1.46-V full scale)
4.5
Pad State After Application of Power to Chip, but Before Reset Release
When a stable power is applied to the CC3235MODx module for the first time or when supply voltage is
restored to the proper value following a prior period with supply voltage below 1.5 V, the level of the digital
pads are undefined in the period starting from the release of nRESET and until the DIG_DCDC of the
CC3235x chip powers up. This period is less than approximately 10 ms. During this period, pads can be
internally pulled weakly in either direction. If a certain set of pins are required to have a definite value
during this pre-reset period, an appropriate pullup or pulldown must be used at the board level. The
recommended value of these external pullup or pulldown resistors is 2.7 kΩ.
Copyright © 2019, Texas Instruments Incorporated
DEFAULT STATE AT FIRST POWER
UP OR FORCED RESET
Analog is isolated. The digital I/O cell
is also isolated.
Analog is isolated. The digital I/O cell
is also isolated.
ADC is isolated. The digital I/O cell is
also isolated.
ADC is isolated. The digital I/O cell is
also isolated.
ADC is isolated. The digital I/O cell is
also isolated.
ADC is isolated. The digital I/O cell is
also isolated.
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Product Folder Links:
CC3235MODS CC3235MODSF
CC3235MODS, CC3235MODSF
SWRS224A – FEBRUARY 2019 – REVISED AUGUST 2019
STATE AFTER CONFIGURATION
OF ANALOG SWITCHES (ACTIVE,
LPDS, and HIB POWER MODES)
Determined by the I/O state, as are
other digital I/Os.
Determined by the I/O state, as are
other digital I/Os.
Determined by the I/O state, as are
other digital I/Os.
Determined by the I/O state, as are
other digital I/Os.
Determined by the I/O state, as are
other digital I/Os.
Determined by the I/O state, as are
other digital I/Os.
Terminal Configuration and Functions
MAXIMUM
EFFECTIVE
DRIVE
STRENGTH
(mA)
4
4
4
4
4
4
35
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