Low-power timer (LPTIM)
28.5
LPTIM low-power modes
Mode
Sleep
Stop
Standby
28.6
LPTIM interrupts
The following events generate an interrupt/wake-up event, if they are enabled through the
LPTIM_IER register:
•
Compare match
•
Auto-reload match (whatever the direction if encoder mode)
•
External trigger event
•
Autoreload register write completed
•
Compare register write completed
•
Direction change (encoder mode), programmable (up / down / both).
•
Update Event
•
Repetition register update OK
Note:
If any bit in the LPTIM_IER register is set after that its corresponding flag in the LPTIM_ISR
register (Status Register) is set, the interrupt is not asserted.
Interrupt event
Compare match
Auto-reload match
External trigger event
Auto-reload register
update OK
Compare register
update OK
Direction change
968/1461
Table 201. Effect of low-power modes on the LPTIM
No effect. LPTIM interrupts cause the device to exit Sleep mode.
If the LPTIM is clocked by an oscillator available in Stop mode, LPTIM is functional
and the interrupts cause the device to exit the Stop mode (refer to
implementation).
The LPTIM peripheral is powered down and must be reinitialized after exiting Standby
mode.
Table 202. Interrupt events
Interrupt flag is raised when the content of the Counter register
(LPTIM_CNT) matches the content of the compare register (LPTIM_CMP).
Interrupt flag is raised when the content of the Counter register
(LPTIM_CNT) matches the content of the Auto-reload register
(LPTIM_ARR).
Interrupt flag is raised when an external trigger event is detected
Interrupt flag is raised when the write operation to the LPTIM_ARR register
is complete.
Interrupt flag is raised when the write operation to the LPTIM_CMP register
is complete.
Used in Encoder mode. Two interrupt flags are embedded to signal
direction change:
– UP flag signals up-counting direction change
– DOWN flag signals down-counting direction change.
RM0453 Rev 1
Description
Description
RM0453
Section 28.3: LPTIM
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