ST STM32G0 1 Series Reference Manual page 1237

RM0444
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:16 TDCV[6:0]: Transmitter delay compensation value
Position of the secondary sample point, defined by the sum of the measured delay from
FDCAN_TX to FDCAN_RX and TDCR.TDCO. The SSP position is, in the data phase, the
number of minimum time quanta (mtq) between the start of the transmitted bit and the
secondary sample point. Valid values are 0 to 127 mtq.
Bit 15 Reserved, must be kept at reset value.
Bit 14 PXE: Protocol exception event
0: No protocol exception event occurred since last read access
1: Protocol exception event occurred
Bit 13 REDL: Received FDCAN message
This bit is set independent of acceptance filtering.
0: Since this bit was reset by the CPU, no FDCAN message has been received.
1: Message in FDCAN format with EDL flag set has been received.
Access type is RX: reset on read.
Bit 12 RBRS: BRS flag of last received FDCAN message
This bit is set together with REDL, independent of acceptance filtering.
0: Last received FDCAN message did not have its BRS flag set.
1: Last received FDCAN message had its BRS flag set.
Access type is RX: reset on read.
Bit 11 RESI: ESI flag of last received FDCAN message
This bit is set together with REDL, independent of acceptance filtering.
0: Last received FDCAN message did not have its ESI flag set.
1: Last received FDCAN message had its ESI flag set.
Access type is RX: reset on read.
Bits 10:8 DLEC[2:0]: Data last error code
Type of last error that occurred in the data phase of a FDCAN format frame with its BRS flag
set. Coding is the same as for LEC. This field is cleared to 0 when a FDCAN format frame
with its BRS flag set has been transferred (reception or transmission) without error.
Access type is RS: set on read.
Bit 7 BO: Bus_Off status
0: The FDCAN is not Bus_Off.
1: The FDCAN is in Bus_Off state.
Bit 6 EW: Warning Sstatus
0: Both error counters are below the Error_Warning limit of 96.
1: At least one of error counter has reached the Error_Warning limit of 96.
FD controller area network (FDCAN)
RM0444 Rev 5 1237/1390
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