Debug Mode; Lptim Interrupts; Figure 220. Encoder Mode Counting Sequence - ST STM32F423 Reference Manual

RM0430
21.4.15

Debug mode

When the microcontroller enters debug mode (core halted), the LPTIM counter either
continues to work normally or stops, depending on the DBG_LPTIM_STOP configuration bit
in the DBG module.
21.5

LPTIM interrupts

The following events generate an interrupt/wake-up event, if they are enabled through the
LPTIM_IER register:
•
Compare match
•
Auto-reload match (whatever the direction if encoder mode)
•
External trigger event
•
Autoreload register write completed
•
Compare register write completed
•
Direction change (encoder mode), programmable (up / down / both).
Note: If any bit in the LPTIM_IER register (Interrupt Enable Register) is set after that its
corresponding flag in the LPTIM_ISR register (Status Register) is set, the interrupt is not
asserted.

Figure 220. Encoder mode counting sequence

RM0430 Rev 8
Low-power timer (LPTIM)
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