ST STM32G0 1 Series Reference Manual page 1231

RM0444
Bits 31:16 Reserved, must be kept at reset value.
Bit 15 NISO: Non ISO operation
If this bit is set, the FDCAN uses the CAN FD frame format as specified by the Bosch CAN
FD Specification V1.0.
0: CAN FD frame format according to ISO11898-1
1: CAN FD frame format according to Bosch CAN FD Specification V1.0
Bit 14 TXP:
If this bit is set, the FDCAN pauses for two CAN bit times before starting the next
transmission after successfully transmitting a frame.
0: disabled
1: enabled
Bit 13 EFBI: Edge filtering during bus integration
0: Edge filtering disabled
1: Two consecutive dominant tq required to detect an edge for hard synchronization
Bit 12 PXHD: Protocol exception handling disable
0: Protocol exception handling enabled
1: Protocol exception handling disabled
Bits 11:10 Reserved, must be kept at reset value.
Bit 9 BRSE: FDCAN bit rate switching
0: Bit rate switching for transmissions disabled
1: Bit rate switching for transmissions enabled
Bit 8 FDOE: FD operation enable
0: FD operation disabled
1: FD operation enabled
Bit 7 TEST: Test mode enable
0: Normal operation, register TEST holds reset values
1: Test Mode, write access to register TEST enabled
Bit 6 DAR: Disable automatic retransmission
0: Automatic retransmission of messages not transmitted successfully enabled
1: Automatic retransmission disabled
Bit 5 MON: Bus monitoring mode
Bit MON can only be set by software when both CCE and INIT are set to 1. The bit can be
reset by the Host at any time.
0: Bus monitoring mode disabled
1: Bus monitoring mode enabled
Bit 4 CSR: Clock stop request
0: No clock stop requested
1: Clock stop requested. When clock stop is requested, first INIT and then CSA is set after all
pending transfer requests have been completed and the CAN bus reached idle.
Bit 3 CSA: Clock stop acknowledge
0: No clock stop acknowledged
1: FDCAN may be set in power down by stopping APB clock and kernel clock.
FD controller area network (FDCAN)
RM0444 Rev 5 1231/1390
1261