ST STM32G0 1 Series Reference Manual page 1290

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Universal serial bus full-speed host/device interface (USB)

Bit 13 LCK: Locked

– Device mode

Bits 12:11 LSOF[1:0]: Lost SOF

– Device mode

Bits 10:0 FN[10:0]: Frame number

USB Device address (USB_DADDR)

Address offset: 0x4C

Reset value: 0x0000 0000

Bits 31:8 Reserved, must be kept at reset value.

Bit 7 EF: Enable function

Bits 6:0 ADD[6:0]: Device address

– Device mode

This bit is set by the hardware when at least two consecutive SOF packets have been

received after the end of an USB reset condition or after the end of an USB resume

sequence. Once locked, the frame timer remains in this state until an USB reset or USB

suspend event occurs.

These bits are written by the hardware when an ESOF interrupt is generated, counting the

number of consecutive SOF packets lost. At the reception of an SOF packet, these bits are

This bit field contains the 11-bits frame number contained in the last received SOF packet.

The frame number is incremented for every frame sent by the host and it is useful for

isochronous transfers. This bit field is updated on the generation of an SOF interrupt.

This bit is set by the software to enable the USB Device. The address of this device is

contained in the following ADD[6:0] bits. If this bit is at 0 no transactions are handled,

irrespective of the settings of USB_CHEPnR registers.

These bits contain the USB function address assigned by the host PC during the

enumeration process. Both this field and the endpoint/channel address (EA) field in the

associated USB_CHEPnR register must match with the information contained in a USB

token in order to handle a transaction to the required endpoint.

These bits contain the address transmitted with the LPM transaction

RM0444 Rev 5

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