ST STM32G0 1 Series Reference Manual page 1223

RM0444
Field
T1 Bit 23
EFC
T1 Bit 21
FDF
T1 Bit 20
(3)
BRS
T1 Bits 19:16
DLC[3:0]
T2 Bits 31:24
DB3[7:0]
T2 Bits 23:16
DB2[7:0]
T2 Bits 15:8
DB1[7:0]
T2 Bits 7:0
D[7:0]
T3 Bits 31:24
DB7[7:0]
T3 Bits 23:16
DB6[7:0]
T3 Bits 15:8
DB5[7:0]
T3 Bits 7:0
DB4[7:0]
Tn Bits 31:24
DBm[7:0]
Tn Bits 23:16
DBm-1[7:0]
Tn Bits 15:8
DBm-2[7:0]
Tn Bits 7:0
DBm-3[7:0]
1. The ESI bit of the transmit buffer is OR-ed with the error passive flag to decide the value of the ESI bit in
the transmitted FD frame. As required by the CAN FD protocol specification, an error active node may
optionally transmit the ESI bit recessive, but an error passive node always transmits the ESI bit recessive.
Table 208. Tx Buffer element description (continued)
Event FIFO control
– 0: Don't store Tx events
– 1: Store Tx events
FD format
– 0: Frame transmitted in Classic CAN format
– 1: Frame transmitted in CAN FD format
Bit rate switching
– 0: CAN FD frames transmitted without bit rate switching
– 1: CAN FD frames transmitted with bit rate switching
Data length code
– 0 - 8: Classic CAN + CAN FD: received frame has 0-8 data bytes
– 9 - 15: Classic CAN: received frame has 8 data bytes
– 9 - 15: CAN FD: received frame has 12/16/20/24/32/48/64 data bytes
Data Byte 3
Data Byte 2
Data Byte 1
Data Byte 0
Data Byte 7
Data Byte 6
Data Byte 5
Data Byte 4
Data Byte m
Data Byte m-1
Data Byte m-2
Data Byte m-3
RM0444 Rev 5
FD controller area network (FDCAN)
Description
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