Rtc Functional Description; Clock And Prescalers; Real-Time Clock And Calendar; Figure 254. Rtc Block Diagram - ST STM32F423 Reference Manual

Advanced arm-based 32-bit mcus
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Real-time clock (RTC)
25.3

RTC functional description

25.3.1

Clock and prescalers

The RTC clock source (RTCCLK) is selected through the clock controller among the LSE
clock, the LSI oscillator clock, and the HSE clock. For more information on the RTC clock
source configuration, refer to
A programmable prescaler stage generates a 1 Hz clock which is used to update the
calendar. To minimize power consumption, the prescaler is split into 2 programmable
prescalers (see
A 7-bit asynchronous prescaler configured through the PREDIV_A bits of the
RTC_PRER register.
A 15-bit synchronous prescaler configured through the PREDIV_S bits of the
RTC_PRER register.
Note:
When both prescalers are used, it is recommended to configure the asynchronous prescaler
to a high value to minimize consumption.
The asynchronous prescaler division factor is set to 128, and the synchronous division
factor to 256, to obtain an internal clock frequency of 1 Hz (ck_spre) with an LSE frequency
of 32.768 kHz.
The minimum division factor is 1 and the maximum division factor is 2
This corresponds to a maximum input frequency of around 4 MHz.
f
is given by the following formula:
ck_apre
The ck_apre clock is used to clock the binary RTC_SSR subseconds downcounter. When it
reaches 0, RTC_SSR is reloaded with the content of PREDIV_S.
f
is given by the following formula:
ck_spre
The ck_spre clock can be used either to update the calendar or as timebase for the 16-bit
wakeup auto-reload timer. To obtain short timeout periods, the 16-bit wakeup auto-reload
timer can also run with the RTCCLK divided by the programmable 4-bit asynchronous
prescaler (see
25.3.2

Real-time clock and calendar

The RTC calendar time and date registers are accessed through shadow registers which
are synchronized with PCLK1 (APB1 clock). They can also be accessed directly in order to
avoid waiting for the synchronization duration.
RTC_SSR for the subseconds
RTC_TR for the time
RTC_DR for the date
746/1324
Section 6: Reset and clock control (RCC) for
Figure 254: RTC block
f
CK_APRE
-----------------------------------------------------------------------------------------------
f
=
CK_SPRE
(
PREDIV_S
Section 25.3.4
for details).
RM0430 Rev 8
diagram):
f
RTCCLK
-------------------------------------- -
=
PREDIV_A
1
+
f
RTCCLK
1
)
×
(
PREDIV_A
+
RM0430
STM32F413/423.
22
.
1
)
+

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